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Analog Bits to Provide Precision PLL and SERDES IP to DesignShare for SiFive Freedom PlatformRISC-V leader adds Analog Bits to speed time-to-market, improve performance of custom open source-based silicon SAN MATEO, Calif., Nov. 14, 2017 -- SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced that Analog Bits, the industry's leading provider of low-power mixed-signal IP (Intellectual Property) solutions, has joined the growing DesignShare economy. Analog Bits will provide precision clocking macros such as PLLs and SERDES IP available for the SiFive Freedom platforms through the DesignShare initiative.
"For two decades, Analog Bits has been an important supplier of low-power IP for use in SoC devices and helped spawn the mobile and computing revolution," said Mahesh Tirupattur, Executive Vice President, Analog Bits. "Through DesignShare, we hope to empower more system developers and provide them with the competitive edge they need to deliver innovative SoC products in a timely manner." The DesignShare model democratizes access to custom silicon and allows any company, maker or inventor to create an entirely new range of applications. Companies like SiFive, Analog Bits and other DesignShare partners help remove traditional barriers to entry that traditionally have blocked users from developing custom silicon. This provides companies with low- or no-cost IP, reducing the upfront engineering costs required to bring a custom chip design based on the SiFive Freedom platform to realization. "The addition of Analog Bits to the DesignShare ecosystem provides engineers with a faster and more efficient way to bring SoCs to market," said Shafy Eltoukhy, who leads the DesignShare program for SiFive. "The adoption of the RISC-V architecture continues to experience significant growth, and with Analog Bits as part of the DesignShare movement, it will be easier and more flexible for designers to employ RISC-V in their future designs across a wide range of implementations." Within months of launching the DesignShare ecosystem, the initiative has granted system designers access to a wide range of technology. In addition to PLLs and SERDES IP, developers can include cryptographic cores, embedded analytics, debug and trace technology, embedded, reconfigurable FPGA and logic-based, non-volatile memory to their SoCs. About SiFive About Analog Bits
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