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Xilinx and Agilent Technologies Demonstrate World's First PowerPC with RapidIO InterfaceSolution uses Alpha Data's ADM XPL board to implement the RapidIO processor solution BOSTON, ESC Boston 2002, Nov. 19, 2002 - Xilinx, Inc. (Nasdaq:XLNX) and Agilent Technologies, Inc. (NYSE:A) today announced that the companies will demonstrate the world's first PowerPC processor with a RapidIO™ interface at the Embedded Systems Conference (ESC) being held at the Boston Hynes Convention Center, Booth #411, from Nov. 19 to 20, 2002. Developed in collaboration with Agilent and Alpha Data, a member of Xilinx XPERTS Program, the demonstration includes the Xilinx® LogicCORE™ Physical Layer RapidIO core and processor buffer designed to connect the core to the PowerPC bus embedded into the Xilinx Virtex-II Pro™ FPGA. Today's news underscores the benefits of the collaboration between Xilinx and Agilent to provide customers with robust and fully tested tools for developing programmable systems and high-speed interconnect solutions such as RapidIO, SPI-4.2, and PCI Express. In October, Xilinx and Agilent also announced the successful integration of the Xilinx ChipScope Pro tool with Agilent's trace core and FPGA trace port analyzer to cut costs and time of programmable in-circuit system design. "The demonstration shows how RapidIO technology can provide seamless connectivity for next-generation networks and embedded systems," said Sam Fuller, president of the RapidIO Trade Association. "Collaboration between leading companies, like this one with Agilent, Alpha Data and Xilinx, will help to accelerate the industry-wide adoption of RapidIO technology and help satisfy the ever-increasing need for bandwidth to enable highly scalable next generation multiprocessing systems." "Xilinx continues to meet market needs for emerging interconnect standards," said Ron Nersesian, vice president and general manager of Agilent's Design Verification Unit. "Agilent continues to work closely with Xilinx, the market leader for FPGAs, to provide customers with robust bus analysis solutions for standards such as Rapid I/O, SPI-4.2, Serial ATA, PCI Express and other high-speed interconnects." "We are extremely pleased to work with Agilent and Alpha Data to demonstrate the capability of our Virtex-II Pro FPGAs and RapidIO solution," said Sandeep Vij, vice president of worldwide marketing at Xilinx. "The proven hardware demonstration will help our mutual customers substantially reduce time-to-market for high-performance and low latency applications such as network control planes, DSP traffic aggregation and enterprise storage channel processing." About the Demonstration License price and availability Xilinx Reference Design Alliance Program About Agilent Technologies About Xilinx ###
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