|
||||||||||
Synopsys Enables Tapeout Success for Early Adopters of Arm Neoverse IPSynopsys' Design, Verification, Software Integrity, and IP Solutions Enable Power, Performance, Area, and Security Required for Server and Networking Products Based on Arm Neoverse IP MOUNTAIN VIEW, Calif. -- Oct. 16, 2018 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that early collaboration with Arm on its next-generation Arm® Neoverse® family of products targeting cloud-to-edge infrastructure has resulted in successful early adopter tapeout in advanced FinFET process technologies using Synopsys' Design Platform with Fusion Technology™, Verification Continuum™ Platform, and DesignWare® interface IP. The collaboration has also produced QuickStart Implementation Kits (QIKs) for Arm's next-generation "Ares" high-performance processor, as well as current Arm Cortex®-A72 and Cortex-A75 processors targeting edge-to-cloud infrastructure systems to enable rapid implementation with optimal quality of results (QoR). "Arm Neoverse platforms provide a scalable and secure solution foundation for cloud-to-edge infrastructure demanding the highest levels of performance, efficiency, and security," said Drew Henry, senior vice president and general manager, Infrastructure Line of Business, Arm. "We continue to work with Synopsys to enable designers with the latest capabilities of the Synopsys tools and interface IP to achieve their performance, power, area, and security targets for Arm Neoverse SoC designs." The QIKs, which include implementation scripts and reference guides, take advantage of the latest features in the Synopsys Design Platform with Fusion Technology, enabling designers to achieve their aggressive infrastructure performance, power, and area (PPA) targets faster. The QIKs for Arm Neoverse processors were collaboratively built using Arm Artisan® POP™ technology in 7-nanometer (nm) process technology. Synopsys' Design Platform with Fusion Technology delivers:
In addition to QIKs, Synopsys offers design services based on extensive experience in hardening Arm processors to enable companies to reach their aggressive infrastructure and networking processor performance goals. These services range from QuickStart implementation through turnkey core hardening. Synopsys' Verification Continuum Platform accelerates software development, verification closure, pre-silicon Arm ServerReady compliance testing, and time-to-market for designs based on Arm Neoverse IP. It also enables verification and integration of complex multi-core subsystems, RAM/memory corruption detection, and automated regression for continuous integration to significantly reduce overall testing time. Synopsys verification solutions for Arm Neoverse products include:
To deliver the required throughput for Arm Neoverse IP, Synopsys provides high-performance, silicon-proven DesignWare interface IP, including PHYs and controllers for DDR, HBM, PCI Express®, CCIX, Ethernet, and USB. Synopsys and Arm have collaborated to optimize the performance of Synopsys DDR and PCI Express IP in Arm-based designs. Security is central to server and networking products. Arm provides a hardware basis for this security with its Arm Neoverse platforms, and Synopsys' Software Integrity Platform, including Coverity® static application security testing, Defensics® fuzz testing, Seeker® interactive application security testing, and Black Duck software composition analysis, helps secure the software for these complex systems. In addition, Synopsys offers professional services, including a wide range of software security and quality services, to help organizations build security in to their designs. "Leading semiconductor and system companies rely on Synopsys tools and interface IP for their most advanced cloud, infrastructure, and networking designs," said Deirdre Hanford, co-general manager, Synopsys Design Group. "Synopsys and Arm have been collaborating for more than 25 years to enable mutual customer success, and our latest collaboration delivers optimized support for Neoverse platforms, where our Design Platform with Fusion Technology, Verification Continuum Platform, and DesignWare interface IP have already enabled tapeout success for early adopters of Arm's next-generation "Ares" processor." Availability About Synopsys
|
Home | Feedback | Register | Site Map |
All material on this site Copyright © 2017 Design And Reuse S.A. All rights reserved. |