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Mentor Graphics Announces TransEDA VN-Cover Emulator Support for Celaro and VStation SystemsParis, January 6, 2003 - Mentor Graphics Corporation (NASDAQ: MENT) today announced the availability of TransEDA's VN-Cover Emulator for both the Mentor CelaroTM and VStationTM hardware emulation systems. The joint solution allows validating the chip level and system level designs by running unlimited verification cycles, thus providing an objective measure of verification progress. It allows easy detection of shortcomings in the functional verification process and assists in the creation of test cases by focusing on uncovered areas in the design. Users can now optimize their test suites for executing on the hardware emulator, and interactively and incrementally improve these tests.
With today's increasingly large and complex designs, verification absorbs 60-70% of the overall design schedule. It can now take weeks and even months to run the tests required to verify a design. Companies are turning to hardware-assisted verification to improve verification quality and productivity in order to complete the verification of SoC designs in the shortest lead times.
The integration of TransEDA's VN-Cover Emulator with Mentor's hardware emulation systems - Celaro and VStation - provides customers with powerful code coverage capabilities to complement their full-chip emulation results, enabling higher quality verification in even less time. VN-Cover Emulator enables a quantitative and objective measurement of verification effectiveness, and maximizes hardware and software system verification completeness. This provides customers with significantly greater confidence in the finished design, and results in better quality for the end product.
"IC designers using the Celaro or Vstation hardware emulator are looking more and more to a unified coverage environment with software simulation," said David Dempster, marketing executive at TransEDA. "Every minute of emulation time must be optimized in the design process, so customers are always looking for ways to complete emulation sooner. Being able to identify those parts of a design that have been adequately verified, versus those which require additional verification, is critical to accelerating verification, and this is where VN-Cover Emulator delivers powerful time-saving benefits."
"Several of our leading customers have expressed the value of combining code coverage with the performance of emulation as delivering a key productivity aid in reducing the verification schedule," said Eric Selosse, vice president and general manager of Mentor Emulation Division. "Many of our customers view TransEDA as being the industry leader in code coverage. We worked closely with our users and TransEDA's engineering team to enable a quick delivery of this capability, on both Celaro and VStation."
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Mentor Graphics is a registered trademark and Celaro and Vstation are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.
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