|
||||||||||
Kaben Synthesizer Clock IP Successfully Deployed at Atsana.Ottawa, ON – January 15, 2003 – Kaben Research Inc., a leading developer of mixed-signal, Intellectual Property (IP) blocks for Wireless, System-on-a-Chip (SoC) manufacturers, announced today that its programmable clock generator IP has been successfully deployed into Atsana Semiconductor's J2210 SoC.
In order to be competitive in the current economic climate, fabless semiconductor manufacturers are being forced to increase the value propositions of their product offering. The natural evolution is to integrate higher levels of functionality onto a single chip, thereby creating an SoC. This higher level of integration meets the demand for lower cost, lower power consumption, and smaller form factors. However, many companies lack the vertical design depth in all of the areas that are required for building a successful SoC. They may be strong RF companies that need help in the digital domain, or signal processing companies that lack expertise in the design of RF or mixed-signal circuits.
One solution is to license cells from third party IP vendors such as Kaben Research. Key to the IP licensing model is that chip vendors can become SoC manufacturers without having leading-edge expertise in every discipline. They can evaluate their core value propositions and internal expertise; focus on executing their strategies, while turning to third-party IP vendors in areas where they do not currently have a competitive edge. Kaben's focus is to deliver mixed-signal IP cells to companies whose strengths lie in areas other than precision timing or high performance frequency synthesis.
The Atsana J2210 is an SoC, combining Atsana's patent-pending Array Processor with an embedded ARM9 RISC processor and a clock multiplier DLL using Kaben's architectures. Targeted to wireless device OEMs, the J2210 complements baseband processors, thus enabling multimedia applications on devices such as cell phones, personal digital assistants (PDAs), and wireless PC cameras.
"Tapping into Kaben's expert knowledge in frequency synthesizers enabled us to reduce the design risks, lower our costs, and shorten our development time; our relationship with Kaben meant that we were free from having to build up our in-house capability just to create a single cell." said Richard Beriault, Atsana's Director of Hardware Engineering. "Having access to Kaben's world-class synthesizer design expertise gave us a great feeling of comfort."
Describing the benefits of Kaben's mixed-signal IP blocks to SoC manufacturers, Kaben VP Sales and Marketing, Seste Dell'Aera said, "Our customers can complement their internal design expertise by integrating Kaben's proven synthesizer cells which means that they can focus on developing IP built from their core capabilities." Referring to the benefits to the system designer, Dell'Aera added, "SoC designers can rapidly integrate Kaben's synthesizer IP according to the specific demands of each product. We help reduce the overall complexity and guess work for the designer by delivering IP blocks that have been previously tested and characterized, thereby minimizing the risk and shortening the time required to bring an extremely complex product to market."
About Atsana
About Kaben
|
Home | Feedback | Register | Site Map |
All material on this site Copyright © 2017 Design And Reuse S.A. All rights reserved. |