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Lattice Accelerates FPGA-based Processor Design with New IP Ecosystem and Design EnvironmentLattice Propel Provides RISC-V Support and a Robust IP Portfolio to Enable Development of Processor-based Systems in Minutes HILLSBORO, OR – June 3, 2020 – Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced Lattice Propel™, a new software solution designed to accelerate development of unique applications based on low power, small form factor Lattice FPGAs. The design environment will empower developers of any skill level to quickly and easily design Lattice FPGA-based applications by enabling the easy assembly of components from a robust IP library that includes a RISC-V processor core and numerous peripherals. The Propel design environment automates application development for developers serving the communications, computing, industrial, automotive, and consumer markets. In order to leverage the parallel processing capabilities of FPGAs in more complex systems, first-time FPGA developers want application design solutions that are flexible, easy-to-use, and integrate all design software and IP required to develop emerging applications without a learning curve. Lattice Propel’s correct-by-construction development tools automate much of the design process to simplify overall system development. Lattice Propel combines system hardware and software design into one tool framework, so software developers can begin creating system software before hardware is available and get products to market faster. “Lattice is providing a robust design environment supporting open standards like RISC-V to enable customers to take advantage of a powerful processor IP ecosystem without getting locked into proprietary technologies and standards,” said Gianluca Mariani, Technical Manager, Lattice Semiconductor. “When combined with the reprogrammability of FPGAs, the Lattice Propel environment makes it simple to upgrade existing hardware and software to support emerging technology trends and industry standards such as Platform Firmware Resiliency. With the release of Lattice Propel, we’ve begun executing against our bold new roadmap for small form factor, low power embedded solutions.” “The release of our Propel design environment is another example of Lattice’s ongoing investment in providing developers with complete software solutions that simplify and accelerate development of low power, Lattice FPGA-based applications,” said Roger Do, Senior Product Line Manager, Lattice Semiconductor. “For novice FPGA developers, the Lattice Propel GUI simplifies the design process by enabling them to drag-and-drop IP blocks from the Lattice IP library into their designs; the tool then automates the design layout to incorporate the new IP. For veteran developers, Propel also supports script-level editing for more granular design optimization or to quickly update existing designs to port them to future Lattice FPGA-powered systems.” Key components of the Lattice Propel design environment include:
Lattice will host a webinar titled “Build Processor-based Systems in Minutes with Lattice Propel Design Environment” on June 23 at 10 a.m. PDT. The webinar will highlight how easy it is to build, compile, analyze, and debug application systems using Lattice Propel. To register, please visit http://www.latticesemi.com/en/About/Newsroom/Webinars. About Lattice Semiconductor Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive and consumer markets. Our technology, long-standing relationships, and commitment to world-class support lets our customers quickly and easily unleash their innovation to create a smart, secure and connected world. For more information about Lattice, please visit www.latticesemi.com.
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