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Actel Strengthens Libero Integrated Design Environment for Next-Generation FPGA DesignsCompany Offers Improvements to Synthesis and Place-and-route Tools; Adds Power Analysis and Security Features for ProASICPLUS Solutions SUNNYVALE, Calif., February 12, 2003 - Actel Corporation (Nasdaq: ACTL), a supplier of innovative programmable logic solutions, today announced it has enhanced its Actel Libero™ integrated design environment (IDE) for the design and development of its field-programmable gate array (FPGA) product families. Actel Libero 2.3 IDE offers improvements to the synthesis and place-and-route tools from Synplicity® and Actel, respectively. Other new features include FlashLock™ support for Actel's flash-based ProASICPLUS devices, additional SmartPower capabilities and several layout enhancements to the Designer R1-2003 software. The new features and capabilities of the Libero 2.3 tool suite enable Actel to offer designers more than a full speed grade of improved performance over the current version and a reduction in design cycle time when designing next-generation FPGA solutions. "As the capabilities of programmable logic devices grow, a comprehensive integrated design environment is critical to design success," said Saloni Howard-Sarin, tools marketing director at Actel. "With the enhancements to and performance improvements enabled by the Libero tool suite, we expect many more designers using the Libero solution will now be able to take advantage of our cutting-edge FPGA products." Enhancements to the Libero Design Environment "Actel and Synplicity have renewed their commitment to providing designers with quality EDA tools for Actel's FPGAs," said Jeff Garrison, director of marketing for FPGA products at Synplicity. "By taking advantage of Synplicity's market-leading FPGA synthesis technology, we believe customers using Actel's Libero integrated design environment will be able to meet aggressive performance and time-to-market goals when designing complex FPGAs, such as Actel's Axcelerator or ProASICPLUS solutions." Updated versions of SynaptiCAD WaveFormer Lite and Mentor Graphics' ModelSim® are also included in the new version of Actel Libero. "We continue to work closely with Actel to offer designers the latest in simulation technology for Actel's programmable logic solutions," said John Lenyo, director of marketing for ModelSim at Mentor Graphics. "A flexible and easy-to-use simulation environment, ModelSim enables designers to bring high-density FPGA products, such as Actel's Axcelerator and ProASICPLUS solutions, to market faster with reduced verification run time." The Actel Designer R1-2003 software contains several layout enhancements, delivering more than a full speed grade of improved performance over the current version. The Actel Designer Extended Layout Script offers up to 32 percent improvements in performance for specific designs. Updates have also been made to the simulation libraries and the SDF timing file. Further, designers of Actel ProASIC and ProASICPLUS FPGAs using the Actel Libero tool suite now may benefit from new SmartPower features, enabling designers to save analysis settings and produce reports. Other enhancements to the Libero IDE include the addition of FlashLock support for Permanent Lock™ feature in ProASICPLUS FPGAs, allowing designers to protect the device by disabling the ability to reprogram or reverse engineer the device. This protects customers from having their designs and intellectual property copied. Actel's Libero Project Manager has also been optimized to include several improvements making it easier to for designers to track and manage changes to projects. Actel Libero and Actel Designer tools also offer enhanced online help in an HTML-based system, including updated documentation and easier access of information. About the Libero Integrated Design Environment The Actel Libero design environment includes best-in-class tools such as Mentor Graphics' ViewDraw™ schematic capture tool; SynaptiCAD's WaveFormer Lite 8.9 test bench generation system; Mentor Graphics' ModelSim 5.6 simulation and design verification software; Synplicity's Synplify 7.2 synthesis software; and Actel's Silicon Explorer verification and logic analyzer tool and Actel Designer place-and-route software. Pricing and Availability Pricing for the Actel Designer Platinum version begins at $995. The Designer Gold and Designer Platinum Evaluation editions are currently available on the Actel Web site. Current customers on maintenance will be upgraded to Designer version R1-2003 at no additional cost. For more information, please contact Actel. About Actel
# # # Editor's Note: The Actel name and logo, Libero, FlashLock and Permanent Lock are trademarks of Actel Corporation. All other trademarks and servicemarks are the property of their respective owners. Actel Strengthens Libero Integrated Design Environment for Next-Generation FPGA Designs
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