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ARM Announces Certified EEMBC Benchmarking Scores For ARM10 Family Core On All Five EEMBC SuitesImprovements in performance, flexibility and functionality derived from earlier benchmarking work CAMBRIDGE, UK – Mar. 12, 2003 – ARM, [(LSE: ARM) (Nasdaq: ARMHY)], the industry's leading provider of 16/32-bit embedded RISC microprocessor solutions, today announced fully-certified EEMBC (Embedded Microprocessor Benchmark Consortium) benchmark scores for the ARM1026EJ-S™ microprocessor core, independently certified by the EEMBC Certification Laboratories (ECL) and certified across all five of the EEMBC benchmarking suites.
The EEMBC benchmarking suites are designed to represent the performance of embedded microprocessors in a variety of real-world applications. Compared to other benchmarking techniques, such as Dhrystone MIPS, EEMBC benchmarks present system developers with a more accurate guide to microprocessor core selection for specific applications. The ARM1026EJ-S microprocessor scores show that the core performs particularly well in the automotive/industrial and consumer suites.
The ARM1026EJ-S core offers developers of ARM® microprocessor core-based solutions greater levels of flexibility and increased performance and functionality in the development of SoCs. These features were introduced in moving to the synthesizable ARM1026EJ-S core and were designed for greater configurability and ease of integration into SoC designs. Some of the innovative architectural ideas in the ARM1026EJ-S core were implemented as a result of extensive performance analysis using the EEMBC benchmark suite during the development process. By building on the high performance, power-efficient ARM1020E™ solution, ARM was able to concentrate its efforts on optimisations including improved branch prediction, an enhanced Bus Interface Unit, the addition of a return stack, and enhancements to the core's data paths.
The EEMBC scores for the ARM1026EJ-S core and the ARM1020E core are as follows:
Scores shown in the above table are "out of the box" (un-optimized) scores and are based on a simulated 0.13m LV process, run at 325MHz and using the ARM RealView® Compiler Tools v2.0 for code compilation.
"EEMBC benchmark scores are a valuable asset to system designers providing a highly reliable view of embedded microprocessor performance in real-world application scenarios," said Markus Levy, president, EEMBC. "The value that the EEMBC methodology delivers is proven by ARM in its intelligent use of the EEMBC benchmark suite to improve the design and performance of the ARM1026EJ-S core, benefiting system developers and the end products where their designs are ultimately used."
"Because of today's ultra competitive markets, getting the cost versus performance trade-off exactly right is a necessity. Benchmarking across all of the EEMBC suites showed us where we could make microarchitectural improvements to the ARM1026EJ-S core," said Simon Segars, executive VP engineering, ARM. "Not only were we able to increase the efficiency of the ARM1026EJ-S core, we were also able to add increased configurability and functionality, while keeping the core size small. For around 4 square millimetres of 0.13um silicon, a cached ARM1026EJ-S processor core will deliver an unprecedented level of performance, functionality and configurability within an extremely tight power profile."
The ARM1026EJ-S core implements the ARMv5TEJ instruction set and includes extensions of the ARM architecture, including the Thumb® 16-bit instruction set, DSP instruction extensions and Jazelle® technology for Java® bytecode acceleration. The core is unique in its implementation, with support for both a Memory Protection Unit (MPU) for running Real-Time Operating Systems (RTOS) and a Memory Management Unit (MMU) for running Platform Operating Systems (OS). This makes the ARM1026EJ-S core a code-compatible upgrade solution to both the industry-proven ARM926EJ-S™ and ARM946E-S™ cores.
Support for the optional IEEE754 compliant VFP10™ Vector Floating-Point Coprocessor and the ETM10RV™ Embedded Trace Macrocell are also included, making the core an excellent choice for demanding embedded and platform OS applications including automotive powertrain systems, wireless Local Area Network (LAN) solutions, and digital set-top boxes.
In a 0.13m process, the ARM1026EJ-S core logic occupies a die area of just 2.7mm2, consumes less than 0.5mW/MHz, and is capable of delivering more than 300MHz under worst case conditions. This makes it one of the smallest, highest performance, synthesizable, 32-bit RISC microprocessor cores available today.
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