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LSI Logic Hypertransport physical interface core power high-speed data transfer rates
MILPITAS, Calif., May 27, 2003 – Demonstrating its commitment to dramatically increase the performance of next-generation computation and telecommunications systems, LSI Logic Corporation (NYSE: LSI) today announced the availability of its HyperTransport™ physical interface (PHY) core, offering an aggregate bandwidth of 12.8 Gigabytes per second (GBps). The LSI Logic HyperTransport PHY core is immediately available for ASIC customers as part of the company's Gflx™ 0.11-micron process technology CoreWare® library and is ideal for use with LSI Logic's innovative RapidChip™ platform ASIC products.
HyperTransport interconnect technology is a popular high-speed, high-performance, point-to-point link for integrated circuits, developed to enable the chips inside high-performance communications, storage and networking devices to communicate with each other faster than with existing technologies.
LSI Logic is a Contributor member of the HyperTransport Consortium, providing expertise in influencing next generation specifications.
"The LSI Logic HyperTranport PHY core adds a new high performance interface to our extensive CoreWare IP portfolio and enables us to maintain leadership in rapidly providing new I/O interfaces to our customers," said Tom Sandoval, vice president, Communications and ASIC Marketing, LSI Logic Corporation. "This is a robust solution that addresses the bandwidth and scalability requirements for new generations of high-performance devices."
The LSI Logic HyperTransport PHY core is compliant with the HyperTransport Technology PHY Interface Specification (Version 1.01) and the HyperTransport I/O Link Protocol Specification (Version 1.03). LSI Logic has performed interoperability testing with GDA Technologies' popular HyperTransport IP designed to help enable HyperTransport adopters to launch HyperTransport technology-based products in a timely manner.
"GDA's proven high quality HyperTransport IP for Cave, Tunnel, Host and Bridge implementations combined with LSI Logic's HyperTransport PHY core provides customers with a pre-verified IP solution that will help shorten time-to-market and cut the cost of product development," said Prakash Bare, vice president of IP Business at GDA Technologies. "We are pleased to be partnering with LSI Logic to speed the development of highly integrated HyperTransport solutions."
Key features of LSI Logic HyperTransport PHY Core
LSI Logic's success with companies such as GDA positions it as the leading ASIC/SoC/Platforms solution provider. The company offers unprecedented versatility for ASIC/SoC/Platforms and standard products for the communications, consumer and storage markets. Customers can design scalable and expandable customized solutions by making use of LSI Logic's extensive library of CoreWare® IP blocks, including GigaBlaze® and HyperPHY™ high-speed SerDes, 10/100 Ethernet PHY, 10/100/Gig/10Gig MACs, XGXS, PCI Express, PCI, PCI-X, PCI-X 2.0, DDR, ARM and MIPS processors, AMBA peripherals and pre-integrated CoreWare subsystems based on these IP blocks. In addition, LSI Logic's world-class flxI/O™ flip chip ball grid array package family and standard package families provide cost-effective, high performance solutions.
About LSI Logic Corporation
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