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eXpreso eFPGA Compiler Achieves 98.6% Packing DensityUp to 1.5x higher Fmax, 2x packing density, and 10x faster compile time MOUNTAIN VIEW, Calif. – June 10th, 2024 – Flex Logix® Technologies, Inc., the leading supplier of embedded FPGA (eFPGA) IP and reconfigurable DSP/SDR/AI solutions, announced availability of eXpreso, its powerful 2nd generation EFLX eFPGA compiler. eXpreso, which has been in development for years, is now shipping to alpha customers for evaluation. The new compiler delivers up to 1.5x higher frequency, 2x denser LUT packing and 10x faster compile times for all existing EFLX tile and arrays. Flex Logix plans to release eXpreso for production later this year. Embedded FPGA provides crucial flexibility, allowing SoCs to adapt to changing standards, protocols, customer requirements and post-quantum cryptography algorithms as well as enables software acceleration and deterministic processing. eXpreso significantly enhances the value of eFPGA by minimizing silicon die area saving cost and power. “I am proud of our eFPGA Software team for the tremendous results delivered by eXpreso,” said Cheng Wang, CTO & SVP Software/Architecture of Flex Logix. “Designs like AES256 are compressed into 2 tiles that used to take 6. And one cryptography algorithm achieved 98.6% LUT utilization – something not achievable even by Xilinx. We are able to achieve this on EFLX because of our interconnect inventions and excellent place and route algorithms. We are working with initial customers now to apply eXpreso to their designs and are seeing good results.”
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