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Altera’s Stratix GX FPGA’s Embedded Dynamic Phase Alignment Simplifies Board Design with PMC-Sierra’s XENON Ethernet Devices
Stratix GX PL4/SPI 4.2 Achieves Interoperability with PMC-Sierra’s XENON Devices at 11-Gbps Transfer Rate for Advanced Data Networking Applications
San Jose, Calif., August 25, 2003 - Altera Corporation (NASDAQ: ALTR) today announced interoperability between its Stratix™ GX FPGAs and PMC-Sierra™, Inc’s (NASDAQ: PMCS) XENON™ family of OC-192, 10 Gigabit Ethernet (GE), and high-density GE devices—ideal for advanced metro area networking equipment such as Ethernet switches and routers. The embedded dynamic phase alignment (DPA) capability featured in Altera’s Stratix GX devices enables accelerated data transfer and frees valuable logic resources for other tasks. By leveraging the combined capabilities of the Stratix GX and XENON devices, system engineers can develop high-performance networking designs that meet specific customer requirements more rapidly and cost-effectively. “Altera’s POS-PHY Level 4 MegaCore® function offers our customers a complete and reusable PL4/SPI 4.2 solution for multi-channel applications, where packet reassembly is a requirement,” said Jean Lamarche, director of marketing and applications, Service Provider Division at PMC-Sierra. “As we have demonstrated with the XENON family, the dynamic phase alignment featured in Altera’s Stratix GX devices greatly reduces the constraints on placement of components, as well as the layout effort required to route the 11-Gbps bus between components.” POS-PHY Level 4 ™/System Packet Interface Level 4 Phase 2 (PL4/SPI 4.2) is a source-synchronous interface protocol used for packet or cell transfers between physical and link layer devices at 10-Gbps data rates and beyond, including 10 GE and high-density GE. Designers can also use PL4/SPI 4.2 to connect two link-layer devices such as an FPGA and a network processor. The Stratix GX device includes a fully OIF SPI 4.2-compliant POS-PHY Level 4 MegaCore logic function with embedded DPA to provide the reliability required to ease board design. Achieving PL4/SPI4.2 Interoperability “PMC-Sierra authored the original POS-PHY Level 4 specification that evolved into the SPI 4.2 standard,” said Tim Colleran, Altera’s vice president of product marketing. “Demonstrating interoperability with their XENON family further validates the ability of our Stratix GX device, with its embedded data phase alignment, to support advanced telecommunication and other networking designs using the SPI 4.2 protocol.” Embedding the DPA feature in the silicon’s source-synchronous channels, as opposed to a software approach, reduces skew and enables higher speed data transmission—up to 1 Gbps. A soft DPA implementation is slower, ties up valuable device logic resources and global clocks, and can be error-prone in the face of temperature or voltage changes. About Stratix GX Devices About PMC-Sierra’s XENON Ethernet Devices The XENON devices enable customers to quickly and easily create a family of line cards by leveraging the design re-use within the devices. The recent addition of the PM3393 S/UNI 1x10GE XP device with integrated XAUI further enhances the flexibility of the XENON family by enabling customers to create line cards with pluggable optics such as XENPAK, XPAK and X2 MSA. The XENON family includes the PM5390 S/UNI 9953, PM5392 S/UNI 9953 POS, PM3392 S/UNI 1x10 GE, PM3393 S/UNI 1x10GE XP and PM3388 S/UNI 10xGE and incorporates the industry’s strongest system expertise on PL4/SPI4.2. All devices are currently in mass production. For more information, visit www.pmc-sierra.com/networking. About Altera About PMC-Sierra ###
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