|
||||||||||
ARC Introduces Family of Single- and Multi-Port High-Speed USB Host Controllers for Embedded Applications
SAN JOSE, CA., September 29, 2003 – ARC International (LSE: ARK), a world leader in user-customizable processors, silicon peripheral IP, real-time operating system and development tools for embedded system design, today introduced the company’s new family of single- and multi-port USB High-Speed (USB-HS) host controllers. The new host-specific solutions are highly optimized, low gate count IP cores that allow system designers to develop compact, cost-effective USB SoCs. The ARC USB-HS single-port host (SPH) core delivers the industry’s lowest gate count for a single-port USB-HS host controller, while the ARC USB-HS multi-port host (MPH) core represents the industry’s first MPH controller solution for embedded USB-HS applications. Each controller port is backward compatible and is able to operate individually at high speed, full speed or low speed. This function is critical as a large number of USB applications are in the process of migrating from exclusively USB full speed to a combination of full- and high-speed ports. The new family of host controllers is targeted for set-top boxes, high-end video gaming systems, residential gateway devices and printer applications for “PC-less printing.” “Our experience in the USB market, coupled with our overall embedded system knowledge, enables us to deliver low-risk solutions to our customers that help them get to market fast,” said Mike Gulett, ARC’s president and CEO. “In developing our new family of single- and multi-port USB-HS host controllers, we utilized our USB experience to provide our customers with a highly optimized IP core, enabling them to implement compact, cost-effective USB-based SoC solutions. We believe this family of host controllers will allow us to extend our leadership position within the USB IP market.” As system architectures vary widely, the new USB host-specific controllers were developed to be highly configurable and programmable, making the cores an excellent match for all system architectures, regardless of their system bus characteristics. Programmable features under software control include adaptive tuning, programmable fill level and enhanced streaming. ARC USB-HS SPH Controller The single-port, host-specific controller is offered as either VHDL or Verilog source code and is capable of operating at all three existing USB speeds. The core is EHCI-compatible and supports both UTMI+ and ULPI PHY interfaces. Architected for high performance and low cost, the core integrates a protocol-aware DMA engine that provides maximized USB data throughput. The controller’s advanced latency buffer architecture eliminates the need for dedicated FIFOs, reducing the number of bus cycles required to accomplish transfers by more than half compared to alternative dedicated FIFO approaches. This reduction in bus cycles translates directly to a reduction in power consumption and also frees up the system processor for other tasks. The need to design a DMA controller is also eliminated. ARC USB-HS MPH Controller ARC's USB-HS MPH controller is EHCI-compatible and supports the UTMI+ interface now and will support ULPI PHY interface as it becomes available. The controller delivers two-to-eight ports, which can individually operate at high-speed, full-speed or low-speed, while maintaining all of the architectural advantages of the single-port solution. An integrated transaction translator enables all high-speed ports to share a combined bandwidth of 480 MB/second. All full-speed ports can share a combined bandwidth of 12 MB/second. Both the single-port and multi-port product utilize proven host functionality, delivered as a component within the ARC USB-HS On-The-Go product. The ARC host’s data throughput has been measured in ARC labs, under real-world conditions, and has been found to be on-par with larger, “chip-set” implementations found on PC motherboards. Specific throughput measurement methodology and results are available via ARC sales channels. ARC’s SPH and MPH High-Speed USB products are supplied as synthesizable, technology-independent VHDL or Verilog RTL source code. As part of its total USB solution, ARC provides customers with simulation test benches and synthesis scripts, as well as proven USB software stacks, class and device drivers. Additionally, through ARC’s CertiPHY program, ARC delivers its customers with a proven portfolio of PHYs and PHY macro-cells that interoperate with ARC USB controllers. Price and Availability The USB-HS SPH controller is available now. The USB-HS MPH controller will begin shipping in Q4. About ARC ARC International is a world leader in SoC and embedded software design and development minimizing risk for customers developing next-generation wireless, networking, industrial control, storage and consumer electronics products. ARC introduced the industry’s first user-customizable 32-bit RISC/DSP processor core, the industry's first USB Hi-Speed On-The-Go IP and today supplies turnkey embedded solutions that combine a real-time operating system, development tools and peripheral hardware and software that enable developers to better design optimization and performance. ARC provides a single source for the major SoC and embedded software building blocks reducing the number of suppliers, reducing cost, reducing risk and reducing time-to-market. ARC International employs approximately 200 people in research and development, sales and marketing offices across North America, Europe and Asia. Full details of the company’s locations and other information are available on the company’s website, http://www.arc.com. ARC International is listed on the London Stock Exchange as ARC International plc (LSE: ARK). Statements made in this press release that are not historical facts include forward-looking statements that involve risks and uncertainties. Important factors that could cause actual results to differ from those indicated by such forward-looking statements include, among others, market acceptance of the ARC technology; fluctuations in and unpredictability of the Company’s quarterly results; general economic and business conditions; regulatory policies adopted by governmental authorities; assumptions regarding the Company’s future business strategy; changes in technology; competition; ability to attract and retain qualified personnel; risks associated with the Company’s international operations; and other uncertainties that are discussed in the “Investment Considerations” section of the Company’s listing particulars dated 28 September 2000 filed with the United Kingdom Listing Authority and the Registrar of Companies in England and Wales. The Company disclaims any intention or obligation to update any forward-looking statements as a result of developments occurring after the date such statement was first made. In view of the many applications in which its Licensees may use the ARC products, ARC cannot warrant that those applications do not infringe the patents of others. ARC strongly encourages its Licensees to become familiar with the policies governing the use and licensing of intellectual property established by any organization whose standards the Licensee wishes to follow, and to review the list most standards-promulgating organizations publish, of entities that claim to have patents relating to the relevant standards or underlying technology. ARC, the ARC logo, ARCtangent, ARCangel, ARCompact, ARChitect, ARCform, CASSEIA, High C, High C/C++, SeeCode, MetaDeveloper, MetaWare, Precise Solution, Precise/BlazeNet, Precise/EDS, Precise/MFS, Precise/MQX, Precise/MQXsim, Precise/RTCS, Precise/RTCSsim are trademarks of ARC International. All other brands or product names are the property of their respective holders.
|
Home | Feedback | Register | Site Map |
All material on this site Copyright © 2017 Design And Reuse S.A. All rights reserved. |