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Toshiba and Rambus to Demonstrate World's Fastest Parallel Interface at Microprocessor ForumRambus's 6.4GHz "Redwood" parallel logic interface optimized for processor, chipset and network chip connections MICROPROCESSOR FORUM, SAN JOSE,CA - October 13, 2003 - Rambus Inc. (Nasdaq:RMBS), a leading developer of chip-to-chip interface products and services, and Toshiba Corporation announced today that they will jointly demonstrate Toshiba's ASIC evaluation chip that incorporates Rambus's parallel logic interface codenamed Redwood. This new evaluation chip is implemented on Toshiba's 90-nanometer ASIC process and is capable of running at speeds up to 6.4GHz, which is six times faster than processor busses available today. The chip is being used as a test vehicle for future customer platforms. The Redwood interface has been designed for high volume, cost-sensitive applications. "We recognize Rambus as a leader in providing high-speed interface technology," said Yutaka Murao, general manager of Microprocessor Division, Semiconductor Company at Toshiba Corporation. "Since we signed the license agreement with Rambus in January 2003, our engineers have been working closely with Rambus to integrate the high-speed chip-to-chip Redwood interface into our evaluation chip. This early evaluation chip is an important step enabling our customers to maintain lower latency and lower power consumption than current solutions, while at the same time providing excellent cost efficiency. The flexible and scalable architecture of Redwood allows us to provide our customers with solutions optimized for their specific needs. Toshiba will apply the result of this joint effort, based on the most advanced process technologies including 65-nanometer, to leading system LSIs." The Redwood parallel bus interface family addresses intra-board applications including processor, chipset and network chip connections. It is optimized for low latency and low power parallel bus applications, and enables high-pin bandwidth to reduce overall package, board, and system costs. Additionally, Redwood can be backwards compatible with existing LVDS-based standards such as HyperTransport, SPI-4 and RapidIO, allowing for easy integration into next-generation products. In order to achieve backwards compatibility, Redwood offers customers a range of frequency and voltage support. "Toshiba has developed state-of-the-art technologies and processes that continue to make them a valuable partner for us in bringing next-generation, high-performance products to the marketplace," said Laura Stark, vice president of the Memory Interface Division at Rambus. "Toshiba's advanced ASIC technology, coupled with our Redwood interface, will help enable data rates of up to 6.4GHz to enable the fastest processor bus speeds available today." Elements integrated into the Redwood technology include a 400MHz to 6.4GHz data rate range, low-voltage differential signaling, backwards compatibility with existing standards, FlexPhase adaptive timing circuit technology, and dynamic current and termination capabilities. Combined, all of these technologies allow Redwood to achieve up to 6.4GHz speeds for low-cost systems. This new evaluation chip will be demonstrated at the Microprocessor Forum at the Fairmont Hotel in San Jose, California, Ocotober 13 - 16, 2003. Additional information on Redwood can be found at www.rambus.com/products/redwood/ About Rambus Inc. About Toshiba Rambus is a registered trademark of Rambus Inc. Other trademarks that may be mentioned in this release are the intellectual property of their respective owners.
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