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Virtual Silicon Introduces Industry-Leading Signal Integrity Views For 130 nm Standard CellsEnables Noise Analysis and Repair EDA Tools Sunnyvale, Calif. - November 3, 2003 - Virtual Silicon, Inc., a leader in semiconductor intellectual property (SIP), today announced the introduction of a comprehensive set of signal integrity (SI) EDA views for their standard cell SIP products targeted for the 130 nm process node. Virtual Silicon’s new SI view now enables designers to be able to use the advanced noise analysis and repair EDA tools offered by Cadence and Synopsys to identify and repair noise related failures in their SoC designs. "Noise induced effects can not only cause an increase in yield loss at final test, but can often result in field failures of an SoC,” said John A. Ford, vice president of marketing for Virtual Silicon. “With noise and IR drop reported by Synopsys as the second largest cause of respins, SoC designers have ample reason to improve their noise analysis capability. Virtual Silicon’s standard cell signal integrity EDA views deliver full Level III noise analysis capability across all EDA tool platforms. Virtual Silicon is the first and only standard cell provider to offer level III noise analysis capability for Synopsys PrimeTime-SI® at 130 nm." “Virtual Silicon is leading the way in providing a comprehensive standard cell library solution for SI,” said Vess Johnson, general manager of the Silicon Correlation Division of Magma. “Using our SiliconSmart™ characterization technology, Virtual Silicon already delivers the most accurately characterized and modeled standard cells in the industry. They have the strongest technology base from which to tackle the challenges of developing the SI views, which are far more complicated than current modeling requirements.” Virtual Silicon’s SI EDA views enable customer’s to use Cadence’s CeltIC®, SignalStorm®, and VoltageStorm®, as well as Synopsys’ PrimeTime-SI® EDA tools. Virtual Silicon offers standard cells at all the leading foundries for the 130 nm process technology. The standard cell library comprises over 600 cells and has incorporated many architectural features for improved design for manufacturability. The standard cells are available for evaluation download on the Virtual Silicon web site located at www.virtual-silicon.com. About Virtual Silicon Technology Virtual Silicon is a leading supplier of semiconductor intellectual property and process technology to manufacturers and designers of complex systems-on-chip (SoC). Headquartered in Sunnyvale, CA, the company provides process-specific embedded components that serve the wireless, networking, graphics, communication and computing markets. Customers include leading fabless semiconductor companies, integrated semiconductor manufacturers, foundries, and SoC developers who demand leading edge technology for their semiconductor innovations. For more information, call (408) 548-2700 or visit Virtual Silicon online at http://www.virtual-silicon.com. Copyright © 2003, Virtual Silicon Technology Inc. All rights reserved. Your Source for IP, Silicon Ready and Virtual Silicon are trademarks of Virtual Silicon Technology, Inc.
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