|
|||
GDA Technologies, Inc. announces the availability of HyperTransportTM Tunnel IP core and Integration services
GDA Technologies, Inc. announces the availability of HyperTransportTM Tunnel IP core and Integration services
San Jose, Calif. - Jan 23, 2002 - GDA Technologies, Inc, a fast growing supplier of Intellectual Property and Design Services, today announced the availability of a HyperTransportTM Tunnel IP and related integration services. HyperTransport interconnect technology is a new high-speed, low latency, point-to-point link for integrated circuits, developed to enable the chips inside of high-performance compute devices, networking and communications devices to communicate with each other faster than with existing technologies. The basic implementation of this HyperTransport Tunnel IP was extracted from technology originally developed by AMD. GDA has converted this to a re-usable IP block to enable high performance IC designs using HyperTransport I/O technology. "This is a very important step in the evolution of the HyperTransport Consortium. As a leader and promoter of HyperTransport technology, AMD is pleased to enable GDA Technologies," said Richard Heye, vice president of Platform Engineering and Infrastructure for AMD"s Computation Products Group. "GDA"s IP offerings and associated services are designed to help to enable HyperTransport adopters to launch HypertTransport technology based products in a timely fashion." HyperTransport technology's bandwidth of 12.8GB/sec represents up to a 48-fold increase in data throughput, compared with existing system interconnects that typically provide bandwidth of up to 266MB/sec. HyperTransport complements externally visible bus standards like the Peripheral Component Interconnect (PCI), as well as emerging technologies including InfiniBand and 10Gb Ethernet. The HyperTransport Tunnel IP from GDA is a fully compliant (Version 1.03), Silicon Validated design with complete verification and synthesis environment. This design provides a highly flexible peripheral interface to user"s logic in addition to the upstream and downstream HyperTransport Link interfaces. A pre-release of the IP will be available for limited customers in January 2002. A general release is planned for April 2002. The IP package consists of Verilog RTL code, Verification environment, Test cases as well as detailed design documentation. The EDA tools supported in the current release are Verilog-NC, Verilog-XL and Design Compiler. In addition to the IP, GDA also offers a suite of design services to enable integration of this core into customer design. GDA will provide additional design, Verification as well as Physical implementation of the customer device on demand. GDA is currently discussing with various semiconductor vendors to qualify this IP in their respective technologies and offer this IP to their end customers. "As HyperTransport technology produces a fast interconnect technology to deal with the latest networking and server applications, we believe this offering from GDA is designed to tremendously boost the proliferation of HyperTransport technology," said Gabriele Sartori, president of the HyperTransport Technology Consortium. "GDA, a contributor member of the HyperTransport Technology Consortium, is positioned to make this IP offering and continue to evolve it as the consortium defines new features and revisions of the specification." Started in 1996, GDA Technologies provides Intellectual Property (IP) and IP enabled design services for IC, System and embedded software design. During this time, GDA successfully developed several networking IP blocks such as Utopia3, SPI-4, 1G/10G MAC and T1/E1 Framer in addition to a suite of SOC components such as PCI, USB, SDRAM Controller, AC97, Reed Solomon and HDLC Controller. In Addition, GDA provides complete design services from SOC integration, Verification, Physical design and Silicon Validation. "HyperTransport is a right choice for many applications that need high bandwidth and limited pin count. With the release of this core, our customers can focus on their vertical expertise while using our HyperTransport tunnel IP to solve the I/O bottlenecks in their IC designs" said AG Karunakaran, President of GDA Technologies, Inc. Key features of GDA Tunnel IP * Compliant with HyperTransport I/O Link Specification, version 1.03 About HyperTransportTM Technology HyperTransport technology is here and now; a high-speed, high-performance, interconnect for integrated circuits that provide a universal connection designed to reduce the number of buses within the system. It provides a high-performance link for networking and embedded applications, and enables highly scalable multiprocessing systems. It is designed to enable the chips inside of PCs, servers, networking and communications devices to communicate with each other up to 48 times faster than existing bus technologies. HyperTransport technology enables system designers to develop very complex, high-performance, scalable networking topologies through switching technology, while maintaining and improving the scalability and performance of their existing legacy PCI infrastructures. Additional information about HyperTransport technology or the HyperTransport Consortium can be accessed on the World Wide Web www.hypertransport.org About AMD About GDA Technologies HyperTransport is a trademark of the HyperTransport Technology Consortium. All trademarks are owned by their respective owners. |
Home | Feedback | Register | Site Map |
All material on this site Copyright © 2017 Design And Reuse S.A. All rights reserved. |