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Mentor Graphics Announces Co-Verification Models for PMC-Sierra MIPS-based Microprocessors to Speed Verification of Embedded ApplicationsWILSONVILLE, Ore., December 16, 2003 - Mentor Graphics Corporation (Nasdaq: MENT) today announced the availability of the Seamless® Hardware/Software Co-Verification Processor Support Packages (PSPs) for PMC-Sierra's RM7000TM and RM7900TM 64-bit families of MIPS-basedTM microprocessors. The Seamless Processor Support Packages provide the ability to create virtual prototypes to validate that hardware and software work together in RM7000 and RM7900 series-based designs, including networking and storage applications, advanced consumer electronics and office equipment such as printers and digital copiers. By validating interfaces and analyzing performance prior to fabrication, systems designers can shave months off their development processes by speeding up the integration process, minimizing redesign cycles, and ensuring optimum system performance. Mentor Graphics and PMC-Sierra collaborated closely on the development of the Seamless Co-verification Processor Support Packages, which have been validated against extensive test suites for the PMC-Sierra MIPS-based microprocessors. The Processor Support Packages implement the Seamless Version 5 Performance Profile viewer, which enables designers to profile software, chart memory transactions, monitor cache efficiency and plot bus utilization and arbitration delay. As a result, this data can be used to identify areas of concern and guide design improvements that yield greater performance. In addition, this collaboration enables C and RTL-based co-verification for PMC-Sierra microprocessors, streamlining the co-verification process. Ricoh Company, Ltd., a global leader in office equipment, recently evaluated and purchased the co-verification models. "Ricoh competes in the office product market, therefore, time-to-market and performance are keys to our market success," said Tadayoshi Miyahara, associate engineer of the Platform Development Center, Imaging System Business Group of Ricoh. "After careful evaluation, we have selected the Seamless Co-Verification microprocessor models for PMC-Sierra's MIPS-based microprocessors since this solution provides an early glimpse of hardware working with software. This allows us to validate that our hardware and software works correctly and efficiently with the PMC-Sierra MIPS-based microprocessor before we commit the design into hardware." "Co-verification has become a primary consideration for designers frustrated by lengthy, costly and resource-intensive verification cycles," said Serge Leef, general manager of the system-on-chip verification division of Mentor Graphics. "PMC-Sierra's commitment to support our development of Seamless PSPs for its microprocessors has provided customers designing with its RM7000 and RM7900 families with a solution to verify critical interfaces and analyze system performance prior to committing the design to hardware." About Seamless To this environment, Seamless Version 5 adds the ability to analyze code, bus and memory performance. These capabilities allow not only the validation of hardware/software interactions, but also give measurement on the quality of the system and guidance on where improvements can be made. Availability About PMC-Sierra's RM7000 and RM7900 64-bit MIPS-based Microprocessors About Mentor Graphics Mentor Graphics and Seamless are registered trademarks of Mentor Graphics Corp. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners. # # #
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