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True Circuits PLL Critical to Parama Networks' new ADM-on-a-ChipJanuary 14, 2004 - LOS ALTOS, California - True Circuits, Inc. (TCI), a leading provider of analog and mixed-signal intellectual property (IP) for the semiconductor, systems and electronics industries, today announced that Parama Networks Inc. (Santa Clara, California) has implemented a True Circuits clock generator PLL as the primary clocking macro in its new ADM-on-a-Chip, fabricated in UMC's 130nm process technology. This chip offers system designers, for the first time on a single piece of silicon, all of the functions necessary to build add-drop multiplexers (ADMs) and other next generation network equipment. The chip was announced on Monday, January 5, 2004. (View the press release at www.paramanet.com/news/pr_jan05.shtm.) "We selected a PLL from True Circuits because of the company's PLL expertise and reputation for supplying proven PLL hard macros," remarked Kent Goodin, Vice President, VLSI Engineering, Parama Networks. "The True Circuits 1.2GHz clock generator PLL is the core component that allows the multi-rate SONET/SDH ports on the ADM-on-a-Chip to operate within the required industry jitter specifications across all supported rates." "Our goal is to ensure our customers can easily meet their performance and timing objectives by utilizing our programmable, low-jitter hard macros," remarked Dr. John G. Maneatis, President of True Circuits. "These design characteristics are particularly important for the timing and performance requirements of ASICs targeting high-speed telecommunication applications like Parama's OC-192 and OC-768 ADMs." About Parama Networks and the ADM-on-a-Chip© About True Circuits PLLs and DLLs About True Circuits True Circuits is headquartered at 4962 El Camino Real, Suite 206, Los Altos, California 94022 and can be found on the web at www.truecircuits.com. Product inquiries can be made by calling the company directly at (650) 691-2500 or via e-mail at sales@truecircuits.com.
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