LSI Logic delivers proven 667 Mbits/sec physical layer core for RLDRAM-II, FCRAM-II and network DRAM-II interfaces

• Single physical core supports three major memory interfaces (RLDRAMII, FCRAMII and Network DRAM-II), offering flexibility to system designers
• High speed memory interface core provides customers with a physical layer and interface buffer that can be easily integrated into ASIC or RapidChip platforms
• Capability enables customers to develop next generation terabit communication and storage platforms that require high density and fast random access memory

MILPITAS, Calif., Feb. 23, 2004- LSI Logic Corporation (NYSE:LSI) today introduced a physical layer (PHY) memory interface ASIC core optimized for operation up to 667 Mbits/sec for RLDRAM-II, FCRAM-II and Network DRAM-II memories. The core is the newest addition to the companys Gflx (0.11-micron) CoreWare portfolio, and supports cell-based ASICs and RapidChip Platform ASICs for fast system-on-a-chip (SoC) designs. Targeted for high-end switches, routers and server applications, the core offers customers a reliable, scalable and flexible solution that is easy to implement.

This new offering, especially when combined with our existing high-speed connectivity solutions, opens up new capabilities for our customers, said Majid Bemanian, senior director of marketing, LSI Logics Communications Products Division. Our physical layer solution brings the performance advantages of advanced SRAM and the density of DRAM to our customers, lowering their overall system cost.

LSI Logics proven physical layer interface with pre-verified functionality, layout, and timing closure allows customers to design high-density chips faster, more predictably and at a lower cost. The physical layer consists of Datapath, Address/Command hardmacros and impedance-controlled HSTL I/O. The HSTL I/O has been designed to address the current 1.8V and next generation 1.5V RLDRAM-II, FCRAM-II and Network DRAM-II memory devices, allowing system designers to scale from current to future lower power devices. Features like On-Die Termination (ODT), linear impedance driver, excellent duty cycle matching and optimized routing provide an interface of superior signal integrity ensuring optimal performance and first pass silicon success. The core and the HSTL I/O are immediately available for customer design-ins.

LSI Logic's extensive library of CoreWare IP offers proven, easy-to-integrate, performance-leading cores and system solutions. The company is a leader in providing connectivity solutions with high-speed standards-compliant SerDes and Memory interfaces - including 622Mbps to 6Gbps SerDes (based on GigaBlaze and HyperPHY cores) which support PCI Express, PCI-X 2.0, Gigabit Ethernet, SGMII, XGXS, XAUI, Serial RapidIO, HyperTransport, InfiniBand, SAS, SATA, 1 to 4.25G Fibre Channel, 1/10Gbit, SGMII, SFI4.1, SPI4.2, XGXS as well as external memory interface solutions for DDR-SDRAM, QDR-SRAM, RLDRAM, FCRAM, and Network DRAM. Additionally, LSI Logic provides a full range of high-performance, cost-effective embedded ARM and MIPS processor cores and associated systems, licensable ZSP DSP cores, reference designs, processor peripherals and AMBA on-chip bus structures.

About LSI Logic Corporation

LSI Logic Corporation (NYSE: LSI) is a leading designer and manufacturer of communications, consumer and storage semiconductors for applications that access, interconnect and store data, voice and video. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035, http://www.lsilogic.com.