TransEDA and EVE Team to Provide Code Coverage for Hardware Verification

Linking VN-Cover Emulator and ZeBu Helps Accelerate SoC Design Cycle

Eastleigh, U.K., Paris and San Jose, Calif., February 23, 2004 – TransEDA, a leader in coverage and ready-to-use verification solutions for electronic designs, and advanced verification specialist Emulation and Verification Engineering (EVE), today jointly announced their collaboration to link code coverage software with hardware verification to help accelerate system-on-chip (SoC) designs.

A version of TransEDA's VN-Cover™ Emulator is now available for EVE's hardware-assisted verification platform ZeBu –– for Zero Bugs ––, giving designers quantitative feedback to complete the emulation phase sooner and the confidence of first-pass silicon success.

With verification consuming more than 70 percent of the application specific integrated circuit (ASIC) development cycle, companies designing networking, telecommunications, wireless, graphics, and multimedia chips are evaluating hardware emulators to help shorten the verification cycle. The addition of code coverage to ZeBu accelerates the detection of inadequate functional verification and augments the efficiency of the verification engineer in writing test cases by focusing on uncovered areas in the design.

VN-Cover Emulator is a compelling productivity tool for the developer of modern complex SoC designs," states Luc Burgun, EVE's chief executive officer (CEO) and president. ZeBu users are now able to take advantage of this powerful capability to increase the efficiency of their testing."

Adding coverage support from VN-Cover Emulator to ZeBu dramatically increases verification productivity," adds John Colley, TransEDA's chief technology officer (CTO). TransEDA's VN-Cover Emulator and EVE's ZeBu provide designers with a cost-effective alternative for high-performance verification."

About Zebu

ZeBu is a hardware-assisted verification platform used to accelerate the verification process of ASIC and field programmable gate array (FPGA) designs and the software development cycle for embedded software designs. Installed on a designer's desktop, it offers the same hardware debugging capabilities found in high-end emulation systems at a higher speed and at a fraction of the cost.

About VN-Cover Emulator

VN-Cover Emulator is a coverage analysis tool for hardware assisted verification systems, providing a quantitative measure of your verification effectiveness. VN-Cover Emulator dramatically reduces the time required to get coverage information on large designs: VN-Cover Emulator allows coverage collection during real-life system verification, and enables the migration of coverage-based verification from simulator to emulator.

About Emulation and Verification Engineering

EVE offers innovative intellectual property (IP) and hardware-assisted verification solutions and verification engineering services that accelerate the design of complex integrated circuits, prevalent in the communications, wireless, networking, computer, and consumer product markets. It has offices in San Jose, Calif. Telephone: (408) 881-0440. Fax: (408) 904-5800. It also has offices in Palaiseau, France. Telephone: (33) 1 64532730. Fax: (33) 1 64532740. Web Site: http://www.eve-team.com.

TransEDA, the TransEDA logo, Verification From Concept to Reality, Verification Navigator and VN-Cover are registered trademarks of TransEDA Technology Ltd. TransEDA and EVE acknowledge trademarks or registered trademarks of other organizations for their respective products and services.