Mentor Graphics Seamless Hardware/Software Co-Verification Tool Speeds Customers SOC Verification For Industry’s Highest Performance Family of 32-bit Synthesizable Cores
MOUNTAIN VIEW, Calif., February 25, 2004 - MIPS Technologies, Inc. (Nasdaq: MIPS) and Mentor Graphics Corp. (Nasdaq: MENT) today announced the availability of the SeamlessÒ Hardware/Software Co-Verification Processor Support Package (PSP) for the embedded industry's highest performance 32-bit synthesizable processor cores, the MIPS32® 24K™ family.
In System-On-Chip (SOC) design, verification of the interface between hardware and software is critical to success and helps ensure fast time-to-market. The Seamless co-verification environment enables designers to create a virtual prototype of their 24K core-based system prior to physical hardware availability, thus reducing the risk of discovering hardware and software problems late in the design cycle. By validating HW/SW interfaces and analyzing the key design performance parameters, designers can shave months off the development process and ensure optimum system performance.
"We are committed to providing our best-in-class co-verification solution for the MIPS high-performance 24K processor family," said Serge Leef, general manager of the Mentor Graphics SOC Verification Division. "Our combined strengths enable our customers to manage the complexity of today's SOCs with greater reliability and time-to-profit efficiencies."
"Giving our customers the tools to bring their MIPS-Based designs to market with speed, ease and efficiency is of utmost importance," said Jack Browne, vice president of worldwide sales at MIPS Technologies. "We have a long-standing relationship with Mentor Graphics, a leader in hardware/software co-verification, and are delighted to count them as a key partner in the vibrant ecosystem of companies providing best-in-class development tools that support the MIPS architecture."
In addition to the 24K family, the Seamless PSPs support the MIPS32 4K™, 4KE™ and 4KS™ and MIPS64® 5K™ processor families, and 20Kc™ and 25Kf™ cores. Mentor Graphics also offers the Seamless PSPs for MIPS-Based™ processors developed by MIPS licensees such as LSI Logic, PMC-Sierra and Toshiba.
About Seamless
Mentor Graphics® Seamless® co-verification environment enables software/hardware development in parallel, removing software from the critical path, reducing the risk of hardware iterations, and increasing overall product quality. Increased visibility into hardware design allows users to debug designs while they are exercised by production software running on the CPU.
About the MIPS32 24K Family
The MIPS32 24K core family, which includes the 24Kc™, 24Kc Pro™, 24Kf™ and 24Kf Pro versions, offers performance up to 550 MHz, the highest frequency available in 32-bit synthesizable cores, while minimizing design time and reducing product costs. Tailored SOC design methodologies, an Open Core Protocol (OCP) interconnect structure, standard libraries and on-chip memories from industry-leading companies help speed time-to-market, an important advantage for a processor core suited to consumer applications such as digital and interactive TVs, set-top boxes and DVD players.
Availability
The Seamless Processor Support Package for the MIPS32 24K family is supported by Mentor Graphics and is available now for Solaris and Red Hat Linux platforms. For more information on how to purchase the Seamless PSPs, visit www.mentor.com/seamless.
Web Seminar
On Tuesday, March 9, at 10 a.m. PST, MIPS Technologies and Mentor Graphics will hold a free web seminar on how to get to market fast with performance-driven applications, using the MIPS32 24K family and the Seamless co-verification environment. To register or obtain more information, visit www.mentor.com/seamless/seminar/mips/.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $675 million and employs approximately 3,700 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.
About MIPS Technologies
MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and business applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at +1 (650) 567-5000 or www.mips.com.
