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MIPS Technologies Verifies Newest 24K Processor Family with Mentor Graphics High-Performance VStationTBX Accelerator
Mentor Graphics VStation™TBX Accelerator Verifies Industry-Leading Performance For MIPS Technologies’550 MHz Synthesizable 32-Bit Core Family
MOUNTAIN VIEW, Calif., March 29, 2004 - MIPS Technologies, Inc. (Nasdaq: MIPS) and Mentor Graphics® Corp. (Nasdaq: MENT) today announced that the industry-leading performance of the MIPS32® 24K™ family of processors, which operates from 400 to 550 MHz worst case in a 0.13 micron process, was verified using the Mentor Graphics VStation™TBX verification accelerator. By using best-in-class technology from companies such as Mentor Graphics, MIPS Technologies is helping customers meet their performance targets using a 24K core. "With Mentor Graphics' verification accelerator, we were able to boot both Linux and the Windows CE .NET operating systems. We ran thousands of tests and 1.8 billion random verification cycles per day while still meeting our internal delivery schedule. With this level of verification quality, we are delivering a 24K core that is proven, solid and reliable," said Don Ramsey, director of CAD operations at MIPS Technologies. "MIPS Technologies has used Mentor Graphics acceleration and emulation products for several years," said Eric Selosse, vice president and general manager of the Mentor Emulation Division. "We are pleased that MIPS Technologies is reaping the performance benefits of our latest verification accelerator products for the development of their newest and most advanced processor family." Mentor Graphics is a technology leader in high-performance hardware-assisted design verification tools. With the VStationTBX system, MIPS Technologies created ultrafast transaction-level testbenches that reduced HDL regression testing time by 1,000 times. By compiling behavioral Verilog code into high-performance testbenches, VStationTBX reduced the time and effort to achieve acceleration. The VStationTBX accelerator is used like a simulator, increasing verification productivity 3 to 5 times by eliminating co-simulation bottlenecks and utilizing existing testbench setups. As Mentor's third generation transaction-based product, the VStationTBX accelerator increases design efficiency by providing a scalable testbench methodology from software simulation to hardware acceleration. The Mentor Graphics and MIPS Technologies Partnership About the MIPS32 24K Family About Mentor Graphics
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