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MIPS Technologies Used Artisan's High-Speed Logic IP to Validate Newest High-Performance 32-Bit Core Family
Artisan’s SAGE-HS™ Standard Cell Libraries Help SOC Developers of MIPS32® 24K™ Core-Based Designs Hit Performance Targets
MOUNTAIN VIEW, Calif., April 5, 2004 - MIPS Technologies, Inc. (Nasdaq: MIPS) today announced that Artisan's SAGE-HS High-Speed Standard Cell Libraries were used to help validate the performance of the new MIPS32® 24K™ family of processor cores, the highest performing 32-bit synthesizable cores in the embedded industry (see related announcement by MIPS Technologies). "When customers implement the 24K core using Artisan's high-speed logic libraries they can be confident that their MIPS-Based silicon products will meet their most demanding performance and area requirements," said Victor Peng, vice president of engineering at MIPS Technologies. "Artisan's cell libraries provided a standard environment in which we were able to validate our design targets and flows. Because their technology also features integrated clock gating cells, the 24K development team was able to implement the core's fine-grain power control capability with a more streamlined and efficient design flow." "We developed our SAGE-HS Library to address the needs of our customers high-performance applications, such as the MIPS 24K core," said Neal Carney, vice president of marketing at Artisan. "We are very pleased that MIPS Technologies has used our high-speed SAGE-HS Library as a reference platform for its high-performance 24K cores. This combination should help designers to make the right decisions for performance and area while meeting the speed targets of the industry's most demanding embedded applications." About Artisan's SAGE-HS™ Libraries About the MIPS32 24K Family About MIPS Technologies
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