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Amphion announce immediate availability of high performance H.264/AVC video coresBelfast, N. Ireland (April 15, 2004) - Amphion Semiconductor Ltd, a leading supplier of digital video semiconductor intellectual-property (IP) solutions, today announced the immediate availability of a high definition H.264/AVC hardware video decoder core for digital television applications including cable and satellite set-top boxes, DVD players, home gateways and media centre PCs. Developments in the area of digital television such as the introduction of H.264, combined with advances in optical storage and digital networks, promise to vastly increase the availability of digital content in the coming years and to power the growth of digital video markets. The Amphion H.264 decoder core (part number CS7050) is fully compliant with ITU-T Recommendation H.264 ISO/IEC 14496-10 4 Advanced Video Coding Standard at Main Profile up to Level 4.1. This new standard, developed by the Moving Pictures Experts Group (MPEG), provides significant improvement over all previous video compression standards. In today's digital networks, limited transmission bandwidth and storage capacity, particularly for high definition (HD) video, stress the demand for higher and higher levels of data compression. Within the H.264 coding algorithm, the maximum levels of compression are achieved by utilizing novel techniques, such as variable block size motion estimation, to improve the coding efficiency and the quality of the video output. However, the computational complexity of practical realizations of the H.264 standard, particularly for real-time HD decoding, significantly exceeds those of previous coding schemes and this may limit its rapid widespread adoption. To address this, Amphion has developed a fully compliant hardware H.264 video decoder IP core which can be readily integrated into next generation multi-million gate systems on chip (SoC) solutions enabling a significant improvement in time-to-market for devices such as advanced set-top boxes, residential gateways, media centre PCs and games consoles. Today, these devices are jostling to be the centre of networked home entertainment systems. The Amphion CS7050 H.264 hardware decoder core has been designed for ultra high performance, with support for a wide range of image resolutions, both high-definition (HD) and standard-definition (SD) at Main Profile up to Level 4.1. Within the hardware, the computationally demanding operations of the H.264 algorithm, for example CABAC, are efficiently implemented. Firmware, running on an Amphion proprietary 32-bit embedded RISC controller, is used to perform high-level control and management operations and to provide flexibility to the solution, for example for implementing additional annexes and extensions to the standard. The core has been designed for easy system integration and includes direct interfaces to the SoC memory control system for storage of reference and decoded pictures in a system-wide shared memory. A key challenge in the development of efficient silicon solutions for H.264 is the management and utilization of the frame memory. The Amphion core exploits a novel and innovative memory management scheme to reduce the bandwidth to the main system memory and thus significantly improve both the throughput of the decoder and the efficiency of the complete SoC. For overall performance, the CS7050 is capable of decoding Main Profile video streams at resolutions up to 2Kx1K and at frame rates up to 30 frames per second when clocked at 266MHz. The implementation requires less than 300K gates and 24 MB of external system memory. When compared with programmable solutions for real time H.264 decoding on DSP or RISC architectures, the Amphion H.264 solution is significantly more efficient. Today, for programmable implementations, it is necessary to use multiple, currently available, media processors or DSPs to achieve a performance level similar to that enabled by a single instance of the H.264 decoder core. Indeed, due to the highly recursive nature of the H.264 algorithm, it is typically not suitable for parallel processor type software implementations, particularly for high resolution video. The robust performance of the decoder has been demonstrated in real-world environments when subjected to a large sample of corrupt and corner case video streams. The CS7050 is available on both ASIC and FPGA technologies, engineered by Amphion for optimal performance while minimising power consumption and silicon area. Amphion also has in development a range of H.264 products targeting further profiles for a wider range of application areas. About Amphion Notes to Editors:
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