Rambus Unveils Turbo PCI EXPRESS* PHY Platform

Dual mode capability supports current 2.5Gbps PCI Express data rate and up to 6.4Gbps for improved performance

LOS ALTOS, Calif., June 21, 2004 - Rambus Inc. (Nasdaq: RMBS), a leading developer of chip interface products and services, today unveiled its Turbo PCI Express* physical layer (PHY) platform which supports data rates of 5.0-6.4Gbps, as well as the 2.5Gbps data rate for today's PCI Express applications. This dual-mode capability allows system developers to increase bandwidth without re-architecting their current PCI Express-compliant system designs. The Turbo PCI Express platform includes a full-featured, drop-in physical layer (PHY) cell based on Rambus's silicon-proven RaSer? serial link technology and offers chip customers a 2x increase in bandwidth over current PCI Express interface designs.

Rambus will provide an overview of the implementation challenges addressed by the Turbo PCI Express PHY and demonstrate the platform at the Rambus Developer Forum (RDF) on July 8 9 in Tokyo, Japan.

"Rambus was the first to demonstrate a 5.0-6.4Gbps backplane serial link platform and we have since developed a suite of PCI Express PHY products, helping to enable the industry's adoption of the PCI Express standard," said Kevin Donnelly, vice president of the Logic Interface Division at Rambus. "We have implemented PCI Express PHYs in more than four processes and continue to work actively with logic partners to ensure full interoperability with the upper protocol layers of the PCI Express standard. Our engineers have analyzed the technical challenges associated with increasing the speed of PCI Express and are ready to support early adopter customers who are planning for their next-generation solutions."

The new Turbo PCI Express PHY uses many of Rambus's patented serial link technologies and innovations to support existing PCI Express clock sources, connectors, and board designs, while being able to auto-negotiate between 2.5Gbps and higher rates, such as 5.0Gbps data rates. Rambus's Turbo PCI Express PHY platform will serve as a basis for a PCI Express second generation PHY product, when such specifications are finalized and become publicly available.

Additional information about the Rambus Turbo PCI Express cell can be found online at www.rambus.com/products/raser/pciexpress/.

About Rambus Inc.
Rambus is one of the world's leading providers of advanced chip interface products and services. Since its founding in 1990, the company's innovations, breakthrough technologies and integration expertise have helped industry-leading chip and system companies solve their most challenging and complex I/O problems and bring their products to market. Rambus's interface solutions can be found in numerous computing, consumer, and communications products and applications. Rambus is headquartered in Los Altos, Calif., with regional offices in Chapel Hill, North Carolina, Taiwan and Japan. Additional information is available at www.rambus.com.

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* PCI Express is a trademark of PCI-SIG.

Rambus is a registered trademark and RaSer is a trademark of Rambus Inc. Other trademarks that may be mentioned in this release are the intellectual property of their respective owners.

Forward-looking statements include statements about the adoption rate of the PCI Express interconnect into and suitability for the computing, consumer and communications markets, as well as the dates of when PCI Express-based systems are expected to ship into their respective markets. Additional forward-looking statements include the ability of Rambus RaSer cells to provide design flexibility in silicon proven process technologies as well as the adoption of these cells in leading PC chipset, graphics, and communication switch and bridge chip applications. These forward-looking statements are subject to risks and uncertainties, which could cause actual results to differ materially from those projected. Those risks include the possibility of reduced market adoption of the PCI Express interconnect protocol, the market response to these products, any delay in the development of Rambus-based products by licensees, any delay in the development and shipment of new Rambus products, any delay in the development and shipment of products compatible with Rambus products, a strong response of the market to competing technology, a failure to sign new contracts or maintain existing contracts for RaSer cell technologies, adverse litigation decisions and other factors that are described in our SEC filings including our 10-K and 10-Qs.