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Renesas Technology to Introduce ESD Protection Technology from Sarnoff EuropeSarnoff's TakeCharge® enables Renesas Technology to accelerate development of leading edge SOI process technology Gistel (Belgium) and Tokyo, October 26, 2004 -- Renesas Technology Corp. and Sarnoff Europe, a wholly-owned subsidiary of Sarnoff Corporation (Princeton, NJ) today announced that they signed an agreement to license Sarnoff's TakeCharge®(1) technology, which allows IC designers to create on-chip electrostatic discharge (ESD)(2) protection circuitry, to Renesas Technology. With this highly-acclaimed technology to shorten time to market by eliminating costly, time-consuming redesigns, Renesas Technology will accelerate the development of advanced system LSI devices applying SOI (silicon-on-insulator)(3) processes. ESD can occur between the printed circuit board and LSI devices during the production process. Static electricity that has built up on the printed circuit board can be discharged when the LSI devices are mounted. This raises the danger that ESD will cause excessive current flow within the LSI device and destroy its internal elements. One way to prevent this is the use of special circuitry to protect the internal elements of the LSI device. In a SOI device the transistors are formed on top of an insulator. This makes such devices even more susceptible to damage from ESD and makes effective counter measures more important than ever. Renesas Technology has long used its own proprietary ESD protection technology in its bulk silicon(4) CMOS products. These products have established a strong reputation for reliability in the marketplace. However, as miniaturization advances, the use of bulk silicon as a raw material is giving way to SOI, especially in the 65 nm process. The development of ESD protection technology in the shortest time possible has become an urgent task in order to accelerate development work on advanced system LSI devices incorporating the latest technology. The TakeCharge® ESD protection technology from Sarnoff Europe will enable the design of optimized ESD protection circuitry in a short period thus making it possible to design and develop new LSI devices in shorter time frames. In addition, it provides a high level of ESD protection in a smaller surface area, which allows the development of smaller chips. Finally, it has low parasitic capacitance, making it ideal for use in high-speed applications. Against this background, Renesas Technology has signed a license agreement with Sarnoff Europe covering TakeCharge® ESD protection circuitry for Renesas Technology's SOI products, including 90nm and 65nm devices. By utilizing TakeCharge®, Renesas Technology plans to supply the marketplace with optimized and compact SOI products offering strong ESD protection while reducing the amount of time required for design and development. “We are gratified that Renesas Technology has chosen TakeCharge to assist in the design of its SOI chips,” said Koen Verhaege, Director, ESD Design Solutions, and Executive Director of Sarnoff Europe, which markets the technology worldwide. “We are proud to have this world-class company as a licensee.” About Sarnoff About Sarnoff Europe About Renesas Technology Corp. Notes 1. TakeCharge® is a registered trademark of Sarnoff Europe. 2. ESD (electrostatic discharge): The discharge of static electricity, either during the mounting of package devices on printed circuit boards or through contact with the human body, can cause problems such as the destruction of the circuit elements of semiconductor devices. It is therefore necessary to take measures to protect against ESD. 3. SOI (silicon-on-insulator): A configuration in which an insulating layer of silicon oxide or the like is formed between the transistors and the silicon substrate. This helps prevent the retention of an electrical charge by the silicon layer and improves the electrical conductivity of the transistors. As a result, power consumption is reduced and it is possible to manufacture semiconductor chips suitable for high-speed data transfer applications. 4. Bulk silicon (or bulk silicon wafer): This term is used to distinguish the single-crystal silicon wafers used for ordinary silicon devices from SOI wafers. * Product names, company names, or brands mentioned are the property of their respective owners.
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