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inSilicon Announces Availability of USB 2 PHY Products
inSilicon Announces Availability of USB 2 PHY Products
SAN JOSE, Calif., January 16, 2001 - inSilicon Corporation (Nasdaq: INSN) - a leading provider of semiconductor intellectual property (IP) communications platforms -- today announced the availability of its initial USB 2.0 physical layer (PHY) semiconductor intellectual property product. inSilicon's USB 2 PHY is the first product delivered from the company's stated analog mixed-signal product strategy and is the fruit of the USB technology development efforts with Tality LLP, the former Cadence Design Systems, which was announced in June 2000. The 40X improvement in data rate offered by USB 2.0 improves the performance of many high-volume consumer applications, including desktop video cameras, portable storage, external CD-R/W, optical scanners, inkjet and laser printers, TV tuners, and audio speakers. "Our USB 2 PHY enables a complete and cost-effective single-chip USB 2.0 implementation," said Robert Nalesnik, vice president of marketing of inSilicon. "When combined with our industry-leading USB 2 Device Controller, we enable customers to realize significant system cost, size and power reductions over multi-chip implementations." The initial foundry process for the USB 2 PHY is the TSMC 0.18-micron CMOS digital logic process, CL018G. A version based on the UMC 0.18-micron process is also slated for development. Semiconductor designers with mixed signal capability can license inSilicon's USB 2.0 PHY integration kit to create USB 2.0 UTMI physical layer components in proprietary processes. The device is a complete mixed signal semiconductor IP solution designed for single-chip USB 2.0 integration in both device and host applications. The USB 2 PHY includes all of the required logical and physical design files to enable designers to implement USB 2.0 capability in System-on-Chip (SOC) design, and fabricate the designs in the designated foundry. The USB 2 PHY integrates high-speed, mixed signal, custom CMOS circuitry compliant with the industry-standard UTMI Specification (version 1.04). The technology supports the USB 2.0 480-Mbps protocol and data rate, and is backward compatible with the USB 1.1 legacy protocol at 1.5 Mbps and 12 Mbps. The USB2 PHY mates to inSilicon's USB 2 Device Controller, announced May 2000, and USB 2.0 Host Controller currently in development. UTMI Streamlines USB 2.0 Development About inSilicon "Safe Harbor" Statement under the Private Securities Litigation Reform Act of 1995: In addition to the historical information contained herein, statements in this press release may contain forward-looking statements within the meaning of the Federal securities laws and are subject to the safe harbors created thereby. These forward-looking statements are based on management's beliefs as well as on a number of assumptions concerning future events made by and information currently available to management. Readers are cautioned not to put undue reliance on such forward-looking statements, which are not a guarantee of performance and are subject to a number of uncertainties and other factors, many of which are outside inSilicon's control, that could cause actual results to differ materially from such statements. For a more detailed description of the factors that could cause such a difference, please see inSilicon's filings with the Securities and Exchange Commission including its Annual Report or Form 10-K. inSilicon disclaims any intention or obligation to update or revise any forward-looking statements, whether as a result of new information, future events or otherwise. This information is presented solely to provide additional information to further understand the results of inSilicon. inSilicon and JVX are trademarks of inSilicon Corporation. |
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