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Nov. 15, 2005 -
One of the fastest-growing components employed in systems, Digital Signal Processors (DSPs), with worldwide unit shipments estimated at 1.5 billion units in 2004, will grow to approximately 2.8 billion units by the end of 2009, reports In-Stat.
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Nov. 16, 2005 -
Tektronix® TLA Logic Analyzers, Altera Quartus II Design Software Version 5.1, and FS2 FPGAView Software Provide Complete Debug Packag
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Nov. 14, 2005 -
Celoxica and Sundance Offer Programmable Solution for Design of Wireless Communications Applications
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Nov. 14, 2005 -
Vote For IEEE P1647Draws Nearly 100% Support; e Language Continues Accelerated Path Toward Final Standardization on March 28
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Nov. 14, 2005 -
New Authorized Design Center Will Provide Turnkey LSI Design Services For Tensilica Customers
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Nov. 09, 2005 -
RTL-to-GDSII flow addresses signal and power integrity while incorporating DFM solutions to help customers streamline their path to silicon
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Nov. 07, 2005 -
While the benefits of multiple cores have been well-documented, the programming tools have not-until now
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Oct. 25, 2005 -
Will offer design services and total solutions on Xilinx Programmable Logic
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Oct. 25, 2005 -
The SPIRIT Consortium is a global organisation concerned with supply-chain collaboration looking to provide a practical answer to multi-vendor design-flow integration, says vice-chairman Christopher Lennard
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Oct. 21, 2005 -
Changes in Freescale Semiconductor's approach to chip design, including centralization of methodologies and tools and the appointment of a renowned design manager, are contributing to improvements in the company's bottom line, according to Sumit Sadana, s
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Oct. 20, 2005 -
Performance Enhancements Enable Additional Functionality and Design Headroom
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Oct. 17, 2005 -
A quiet shift is emerging in electronic system-level design. Rather than look to upend existing methodologies, ESL providers are moving toward practical tools that solve real and immediate problems.
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Oct. 12, 2005 -
Three emerging chip-to-chip interconnections: HyperTransport, PCI Express, and RapidIO are being increasingly integrated into semiconductors and systems, and shipments bearing these technologies will grow over the next several years, reports In-Stat
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Oct. 06, 2005 -
The collaboration of the two companies resulted in a fully functional, HomePlug®-compliant powerline networking system-on-chip
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Oct. 04, 2005 -
Encounter Synthesis, Implementation, and Verification with Cadence Services Enable Flexible Path to High-Performance, Low-Power Design for New ARM Processor
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Oct. 04, 2005 -
Chartered Appoints Dr. Simon Yang as SVP and CTO
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Oct. 04, 2005 -
Production 65 Nanometer RTL-to-GDS Design Flow Supports Rapid Development of 500MHz IC in Leading-Edge Nanometer Silicon Technology
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Sep. 30, 2005 -
The PCI Express demonstration system is a result of the collaboration and partnership between Eureka Technology and Rambus.
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Sep. 30, 2005 -
The component kit goes beyond limits of traditional mixed-signal verification solutions
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Sep. 27, 2005 -
Custom-Synthesized Design Approach Reduces Time to Market for PowerPC Designers
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Sep. 26, 2005 -
Verification IP Product Combines with Advanced Methodologies and Tools to Deliver a High-Performance Integrated Verification Environment
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Sep. 26, 2005 -
Topaz Offers Fast Customization Supporting Individual Customer Needs
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Sep. 21, 2005 -
Common Platform partners, EDA vendors to align on information and expertise sharing, focus on manufacturability to target customer-enabled DFM solutions
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Sep. 21, 2005 -
Constant innovation in the integrated circuit (IC) industry, coupled with a growing demand for high- performance electronic devices, is driving the uptake of novel design platforms such as structured application-specific integrated circuits (ASICs)
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Sep. 21, 2005 -
VMM Standard Library Enables Adoption of Techniques in the ARM-Synopsys Verification Methodology Manual (VMM) for SystemVerilog
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Sep. 21, 2005 -
New ARM-Synopsys Book Provides Blueprint for System-on-Chip Verification Success Using SystemVerilog
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Sep. 21, 2005 -
GUC uses Kilopass' embedded XPM technology to add a secure ID feature to its consumer electronics design, which is being implemented in silicon at the world's leading pure-play foundry
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Sep. 13, 2005 -
Rapid Turnkey, Low-Power Wireless and Digital Consumer ASICs Simplified with Sonics' Technology
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Sep. 12, 2005 -
Alliance Produces Methodology Kit to Improve Performance, Power, and Area for Synthesizable ARM Processors
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Sep. 12, 2005 -
Alliance Produces Methodology Kit to Improve Performance, Power, and Area for Synthesizable ARM Processors
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Sep. 06, 2005 -
Leading foundry begins prototyping ultra-low leakage high-voltage, SiGe BiCMOS and OTP solutions
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Sep. 05, 2005 -
Today, in its scheduled mid-quarter update, Chartered Semiconductor Manufacturing updated its third-quarter 2005 guidance, which was originally provided on July 22, 2005
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Sep. 02, 2005 -
Chartered Announces Completion of Tender Offer for 2.5% Senior Convertible Notes Due 2006
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Aug. 04, 2005 -
Hardware, software design on collision course, panel finds
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Jul. 25, 2005 -
Bangalore Center Taps Local Engineering Talent and Enhances Silicon Design Capabilities for Automotive, Medical and Industrial Applications
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Jul. 25, 2005 -
Companies Validate Low-Power Design Techniques from Architecture Through Implementation to Enable 40% Power Reduction
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Jul. 15, 2005 -
Eureka’s PCI Express Controller Core is designed for both ASIC and FPGA implementations. The Controller Core includes the Transaction Layer, Data Link Layer and Physical Layer of the PCI Express Specification. It conforms to the latest 1.0a revision and i
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Jul. 14, 2005 -
Pursuing its mission to be China's top intellectual property hub, the Hong Kong science park is forging partnerships with four Chinese universities with the aim of developing a legal and technical qualification process for local companies looking to use I
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Jul. 12, 2005 -
As part of the agreement, S3's high performance low power A/D converter has been optimized by their experienced mixed signal design team to meet Atmel's stringent requirements for the Camera Module
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Jul. 11, 2005 -
New Static Timing Analysis Engine and Expanded Third-Party Support Enable Designers to Meet Timing Closure and Achieve Higher Performance