NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
1611 Results (321 - 360) |
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Open-Silicon Tapes Out Industry's First High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs in 16nm FF+
Sep. 28, 2016 - Open-Silicon, a system-optimized ASIC solution provider, today announced it has successfully taped out the industry’s first High Bandwidth Memory (HBM2) IP subsystem in TSMC’s 16nm FF+ process in combination with TSMC’s CoWoS® 2.5D silicon interposer technology -
Cadence and TSMC Advance 7nm FinFET Designs for Mobile and HPC Platforms
Sep. 23, 2016 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced several important deliveries in its collaboration with TSMC to advance 7nm FinFET designs for mobile and high-performance computing (HPC) platforms. -
Synopsys Joins GLOBALFOUNDRIES' FDXcelerator Partner Program to Enable Innovative Designs Using the FD-SOI Process
Sep. 09, 2016 - Synopsys and GLOBALFOUNDRIES today announced that Synopsys has joined the foundry's FDXcelerator™ Partner Program, an ecosystem designed to facilitate 22FDX™ system-on-chip (SoC) designs. -
BaySand Expands Its Board of Directors With Senior Semiconductor Veteran Executive
Aug. 17, 2016 - James Hogan joins BaySand’s board with experience as a senior executive and board director in electronic design automation and intellectual property companies -
Open-Silicon Strengthens Management Team With Key Executive Appointments
Jul. 26, 2016 - Mark Wright, former President of Faraday Technology Corporation, USA, will serve as Senior Vice President of Sales and Marketing for Open-Silicon, and Anam Haque, former Vice President of Engineering for Synapse Design, has been appointed Vice President of Silicon Engineering. -
Test and Verification Solutions expands its operations in Silicon Valley, USA
Jul. 20, 2016 - Test and Verification Solutions LLC (T&VS), a leading hardware verification and software testing solutions and services provider, today announced the opening of its new office in San Jose, CA. This is the second expansion and a key strategic location in the US, where T&VS is able to provide onsite/nearshore ... -
Open-Silicon to Showcase Breadth of ASIC Solutions at CDNLive 2016, Bangalore, India
Jul. 07, 2016 - Open-Silicon, a system optimized ASIC solutions provider, today announced it will demonstrate the company’s IoT ASIC Platform and HMC 2.0 Memory Controller IP at CDNLive (August 9-10, 2016- Bangalore, India). -
Do not miss the Green Thursday offering for ultra Low-Power SoCs at 55 nm
Jun. 23, 2016 - Leading-edge More-Than-Moore process variants at 55 nm for the challenges of IoT and wearable devices deserve equally state-of-the-art low power design methodologies: it involves Silicon IPs for embedding the Power Regulation Network and for the SoC Mode Control Network, together with the transfer of ... -
Open-Silicon Selected for ARM Approved Design Partner Program
Jun. 13, 2016 - Open-Silicon, a system-optimized ASIC solution provider, today announced it has been selected to join the ARM® Approved Design Partner program. Partners in this new initiative are leading design and ASIC houses that will assist customers with designing an SoC for the first time, and help in-house teams ... -
Truechip adds a new customer for PCIe Verification Solution
Jun. 07, 2016 - Truechip Solutions Pvt. Ltd. (“Truechip”), the Verification IP specialist, today announced that it had shipped its PCIe Verification IP to Logicircuit, Inc. for verification of its PCIe controller core. -
Cadence Expands Collaboration with ARM to Accelerate Custom SoC and IoT System Designs with Industry's First End-to-End Hosted Design Solution
Jun. 07, 2016 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the industry’s first complete hosted end-to-end solution to enable designers to accelerate their custom SoC and Internet of Things (IoT) design process using ARM Cortex®-M processors. -
Open-Silicon to Present and Demonstrate at DAC 2016
Jun. 06, 2016 - Open-Silicon, a system-optimized ASIC solution provider, today announced that it will present a technical paper and two posters, and demonstrate its breadth of ASIC solutions at the Design Automation Conference (DAC), June 6-8, 2016 in Austin, Texas. -
Synopsys' SpyGlass Solution Delivers Critical Technology to Enable Compliance with DO-254 Aviation Safety Standard
Jun. 02, 2016 - Synopsys, Inc. (Nasdaq:SNPS) today announced the availability of key technology required by airborne electronic hardware (AEH) system-on-chip (SoC) teams for compliance with the DO-254 standard. The DO-254 standard is used to ensure the highest level of safety in AEH designs for airborne applications. ... -
Synopsys Expands Software Integrity Strategy to Enable Development of Safer and More Secure Automotive Software
May. 23, 2016 - Synopsys today announced that it is expanding its Software Integrity strategy to address the cybersecurity and safety challenges faced by the automotive industry. -
eASIC Joins the OpenPOWER Foundation to Offer Custom-designed Accelerator Chips
May. 04, 2016 - eASIC®, a fabless semiconductor company that delivers a custom integrated circuit (IC) platform (eASIC Platform) today announced it has joined the OpenPOWER Foundation, an open development community based on the POWER microprocessor architecture. -
HDL Design House Joins PCI-SIG
Apr. 11, 2016 - HDL Design House has joined PCI-SIG®, an association of 750+ industry companies committed to advancing the PCI Express® (PCIe®) architecture as an open industry standard. -
Open-Silicon to Exhibit and deliver two Tech Talks at IP SoC 2016, Bangalore on Wednesday, April 6, 2016
Mar. 30, 2016 - Open-Silicon, a system optimized ASIC solutions provider, will be exhibiting and delivering two tech talks at the D&R IP SoC 2016, Bangalore. -
M31 Technology Announces Its Release of TSMC's 28HPC+ ULL SRAM Compilers for the Intelligent Device Market
Mar. 14, 2016 - M31 Technology announced today its release of TSMC's 28HPC+ ULL SRAM Compilers for the Intelligent Device Market. These IP cores will enable designers to realize the features and benefits of a low power, high performance, and cost effective SoC design. -
QuickPlay Extends its Leadership in Software Defined FPGA Development Flow with the Release of Version 2.0
Mar. 03, 2016 - PLDA today announced the release of version 2.0 of its QuickPlay® development platform. QuickPlay is a software defined FPGA development environment that enables developers with little to no FPGA expertise to build FPGA designs seamlessly and have working hardware in record time. -
eASIC Enables Improved Real-Time Hardware Acceleration Performance for ASOCS' Fully Virtualized RAN (vRAN) Solution
Feb. 24, 2016 - eASIC® Corporation, a fabless semiconductor company that delivers a custom integrated circuit (IC) platform (eASIC Platform), and ASOCS Ltd., a solution provider of virtual Base Stations (vBS) today announced that the eASIC Nextreme-3 platform was used by ASOCS to deliver significantly higher performance ... -
Mentor Graphics Signs Multi-year Agreement with ARM for Early Access to ARM IP to Accelerate SoC Verification, Implementation and Testing
Feb. 17, 2016 - Mentor Graphics has signed a multi-year subscription agreement with ARM to enable early access to a broad range of ARM intellectual property (IP) and related technologies. This will enable Mentor to optimize its tools and methodologies for ARM-based system-on-chip (SoC) designs. -
Sidense Hires Industry Veteran Ken Wagner as Senior VP Engineering
Jan. 21, 2016 - Sidense today announced that Ken Wagner has joined Sidense as the Company’s Senior Vice President of Engineering. Ken will be reporting to Sidense President and CEO Xerxes Wania and will assume responsibility for all of Sidense's engineering activities. -
Intellitech Granted US Patent for Pay-per-Instance IP core Licensing
Dec. 21, 2015 - Intellitech® Corporation, the technology leader in solutions for IEEE 1149.1-2013 Silicon Instrument development, has announced it has been granted US patent 9,152,749 entitled "Management system, method and apparatus for licensed delivery and accounting of electronic circuits". -
eASIC Reports Continued Revenue Growth and Record Profitability
Dec. 07, 2015 - eASIC today announced that revenues for the nine months ended September 30, 2015 grew 18% over the same period in 2014. -
Xilinx Launches Vivado Design Suite HLx Editions, Bringing Ultra High Productivity to Mainstream System & Platform Designers
Dec. 01, 2015 - Xilinx today announced the Vivado® Design Suite HLx Editions, enabling a new ultra high productivity approach for designing All Programmable SoCs, FPGAs, and the creation of reusable platforms. -
Open-Silicon Offers IoT Custom SoC System Based on ARM Cortex-M Processors
Nov. 09, 2015 - Open-Silicon has announced a scalable IoT custom SoC system utilizing ARM® Cortex®-M processors and the ARM mbed™ SDK. The IoT system, launched with an ARM Cortex-M4 processor-based SoC reference design, features ARM TrustZone® CryptoCell hardware-accelerated security technology. -
Andes Technology and INVECAS Enter Into a High Value Collaboration to Win Designs for GLOBALFOUNDRIES 22FDSOI and 14LPP Processes
Oct. 21, 2015 - Andes Technology and INVECAS today announced a high value collaboration. Andes and INVECAS will develop platforms on GLOBALFOUNDRIES' advanced process nodes enabling customers to reduce their risk and time to market. -
Xilinx Vivado Design Suite 2015.3 Takes Design to New Heights with IP Sub-Systems
Oct. 06, 2015 - Xilinx today announced the 2015.3 release of the Vivado® Design Suite. The new release enables platform and system developers to increase productivity and decrease development costs by enabling design teams to work at a higher level of abstraction with new market-tailored, plug-and-play IP sub-systems. ... -
Xilinx System Generator Simplifies Wireless Design
Oct. 06, 2015 - Xilinx today announced the 2015.3 release of System Generator for DSP, the industry's leading high-level tool for designing high performance DSP systems using Xilinx® All Programmable devices. -
Synopsys Unveils New ATPG Technology Delivering 10X Faster Test Pattern Generation
Oct. 05, 2015 - Synopsys today announced a new, breakthrough ATPG and diagnostics technology that delivers 10X faster run time and 25 percent fewer test patterns to shorten schedules, accelerate silicon debug and reduce test time and cost. Innovative, memory-efficient engines for test generation, fault simulation and ... -
Intellitech iJTAGServer leverages Cadence Incisive Enterprise Simulator for IEEE 1149.1-2013 Silicon Instrument Verification
Oct. 01, 2015 - Intellitech® Corporation, the industry leader in solutions for IEEE 1149.1-2013 Silicon Instrument™ development, has announced interoperability between its NEBULA silicon debugger, iJTAGServer and Cadence® Incisive® Enterprise Simulator. -
Open-Silicon Announces Comprehensive High Bandwidth Memory (HBM) Gen2 IP Subsystem Solution
Sep. 29, 2015 - Open-Silicon, a system optimized ASIC solution provider, announced today the industry's first High Bandwidth Memory (HBM) subsystem IP. The solution is available for 2.5D ASIC design, starts today and will also be made available as licensable Intellectual Property (IP). -
Open-Silicon Joins Synopsys ARC Access Program
Sep. 14, 2015 - Through its OpenMODEL(TM) process, Open-Silicon constantly strives to enable customers to utilize the best technology available by providing system designers with pre-validated solutions that enable the delivery of the energy-efficient, always-on processing required for IoT applications. This process ... -
Mentor Graphics Drives Next-Generation, Low-Power Verification with UPF Successive Refinement Methodology
Sep. 09, 2015 - Mentor Graphics today announced support for the Low Power Successive Refinement Methodology using Questa Power Aware Simulation and new capabilities in the Visualizer Debug Environment to dramatically improve verification re-use and productivity for low power designs using ARM technology®. -
Intellitech iJTAGServer Brings IEEE 1149.1-2013 IP Block Verification to Synopsys VCS
Sep. 09, 2015 - Intellitech has announced interoperability between its NEBULA silicon debugger, the Intellitech iJTAGServer bridge, and the Synopsys VCS® functional verification environment. -
Open-Silicon Partners With Silicon Catalyst
Sep. 08, 2015 - Open-Silicon announced today a partnership with Silicon Catalyst, the world’s first incubator for semiconductor solution start-ups. Open-Silicon has joined forces with Silicon Catalyst to enable semiconductor start-ups to increase silicon innovation rates and pursue big ideas. -
Open-Silicon and Cadence Collaborate on DSP-Based Custom SoC Platform
Aug. 27, 2015 - Open-Silicon, a system optimized ASIC solution provider, announced today the collaborative development of a scalable SoC subsystem using the Cadence® Tensilica® Fusion digital signal processor (DSP). -
eASIC and ASOCS Partner to Develop Custom Silicon Accelerators for Network Function Virtualization (NFV)-based Virtual Base Station Solutions
Aug. 24, 2015 - eASIC and ASOCS today announced that they have signed a definitive agreement to develop a custom silicon device for the acceleration of next-generation network virtualization applications utilizing the eASIC Nextreme-3 platform. -
eASIC and Tamba Networks Announce Immediate Availability of 100 Gigabit Ethernet Solution for Data Center, Core and Access Network Switching Applications
Aug. 17, 2015 - eASIC and Tamba Networks today announced the immediate availability of a 100 Gigabit Ethernet MAC (media access controller) and PCS (physical coding sublayer) solution for high bandwidth applications, such as data center, and core and access network switching. -
eASIC Announces Nextreme-3 Platform Support for PCIe Gen 3.1 - SRIS
Aug. 11, 2015 - eASIC today announced immediate availability of silicon-proven transceivers optimized for the PCIe 3.1 electrical specification.