Bluetooth low energy v5.4 Baseband Controller, Protocol Software Stack and Profiles IP
1611 Results (361 - 400) |
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Dolphin Integration and TSMC collaborate on Low-Power IoT Subsystem Design
Aug. 10, 2015 - Dolphin Integration today announced a collaborative effort with TSMC to ease the design and optimization of Internet of Things (IoT) subsystems for System-on-Chip (SoC) integrators. -
GLOBALFOUNDRIES Launches Industry's First 22nm FD-SOI Technology Platform
Jul. 13, 2015 - The “22FDX™” platform delivers FinFET-like performance and energy-efficiency at a cost comparable to 28nm planar technologies, providing an optimal solution for the rapidly evolving mainstream mobile, Internet-of-Things (IoT), RF connectivity and networking markets. -
SmartDV's USB Power Delivery Verification IP Successfully Deployed by Lattice Semiconductor
Jul. 08, 2015 - Within a four week period, SmartDV Technologies delivered verification IP to Lattice Semiconductor. Lattice Semiconductor used the verification IP to verify and tape out their chip with a type C/CC connector interface that supports the new USB power delivery specification. -
Test and Verification Solutions opens third Indian office in Hyderabad
Jun. 22, 2015 - Test and Verification Solutions (T&VS), a leader in software test and hardware verification solutions, today announced that it is opening an office in Hyderabad, India. T&VS expects to provide support for the company’s range of products and services to customers in Hyderabad via the local office ... -
SESAME BIV standard cell library: Dolphin Integration's ultra low-power solution for always-on blocks
Jun. 22, 2015 - Decreasing the power consumption of SoCs is an ever-increasing challenge that requires power optimization of each individual subsystem. Dolphin Integration proposes the SESAME BIV standard cell library to answer the need for ultra-low power always-on blocks. -
JEDEC to update Solid State Drive Standard
Jun. 16, 2015 - JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced that its JC-64.8 Subcommittee for Solid State Drives is currently engaged in an effort to update the JESD218 standard for Solid State Drive Requirements and ... -
eASIC and Comcores Deliver CPRI v6.1 Switch Reference Design for Next-Generation LTE Advanced and 5G Networking Equipment
Jun. 16, 2015 - eASIC and Comcores today announced immediate availability of a common public radio interface (CPRI) v6.1 switch reference design. -
Open-Silicon Expands Management Team
Jun. 09, 2015 - As ongoing effort to provide holistic system-level approach to ASIC design and strengthen specification-to-volume production capability, Open-Silicon’s President and CEO, Taher Madraswala, announced the addition of two industry veterans to the executive team: Vasan Karighattam and Amal Bommireddy. -
TSMC Certifies Synopsys' IC Compiler II for its Latest 16-nm Production FinFET Plus Process
Jun. 08, 2015 - Synopsys today announced TSMC's certification of the IC Compiler™ II place and route solution on TSMC's 16-nm FinFET Plus (16FF+) process. -
IBM Introduces Industry's First Enterprise-Class Cloud Service for Designing Electronic Systems for Mobile Phones and Wearable Devices
Jun. 08, 2015 - IBM today announced that it is launching IBM High Performance Services for Electronic Design Automation (EDA), the electronic industry’s first enterprise-class, secure cloud service, which provides on-demand access to electronic design tools, in partnership with SiCAD, Inc., a Silicon Design Platform ... -
Open-Silicon Shows Breadth of ASIC Solutions at DAC 2015
Jun. 05, 2015 - Open-Silicon, an ASIC solutions provider, today announced it will demonstrate the company’s Industrial IoT ASIC Platform, 28Gbps SerDes Evaluation Platform, 2.5D SoC Solution and HMC 2.0 Memory Controller IP at DAC (Jun 8-11, 2015- San Francisco, CA). -
Mentor Graphics Enterprise Verification Platform Delivers New Levels of Performance and Low Power Verification Productivity
Jun. 05, 2015 - Mentor Graphics today announced enhancements to the Mentor® Enterprise Verification Platform (EVP) that offer new levels of performance and productivity across the platform in simulation, debug, formal, coverage closure and low power verification. -
Mentor Graphics Tessent Hierarchical ATPG Solution Selected by Mellanox Technologies for Giga-gate Designs
May. 18, 2015 - Mentor Graphics today announced that Mellanox Technologies has standardized on the new Mentor® Tessent® Hierarchical ATPG solution to manage the complexity and slash the cost of generating test patterns for their leading-edge integrated circuit (IC) designs. -
Xilinx Accelerates System Verification with Vivado Design Suite 2015.1
May. 04, 2015 - Xilinx today announced acceleration of system verification with the release of the Vivado® Design Suite 2015.1, featuring major productivity advances for the development and deployment of All Programmable FPGAs and SoCs. -
eInfochips introduces NVMe Solution Portfolio for Flash based SSD storage products
Apr. 30, 2015 - eInfochips has announced the availability of their NVMe Verification IP (VIP) and Post-silicon Validation Test Suite based on the latest available protocol standards (NVMe 1.2) from NVME.ORG body. -
Cadence Introduces Indago Debug Platform, Improving Debugging Productivity by up to 50 Percent
Apr. 28, 2015 - Cadence today announced the Cadence® Indago™ Debug Platform, a new debugging solution which reduces the time to identify bugs in a design by up to 50 percent compared to traditional signal- or transaction-level debug methods. -
Open-Silicon Ships 100 Million ASICs
Apr. 24, 2015 - Open Silicon announces a major milestone — the shipment of its 100 millionth ASIC in Q1 2015. Proving industry-wide adoption of OpenMODEL™, the semiconductor industry’s first end-to-end ASIC development solution is based on a revolutionary business model that provides a seamless, low-cost, and ... -
IPextreme Takes Semiconductor IP to New Heights at DAC 2015 in San Francisco
Apr. 23, 2015 - IPextreme and Constellations partners band together in IP community and support IP-related programming at the 52nd Design Automation Conference in San Francisco, California -
Open-Silicon Streamlines ASIC Quotation Process
Apr. 16, 2015 - In an effort to facilitate and improve the turnaround time for ASIC quotations, Open-Silicon has designed a web portal. This environment provides the customer with an intuitive web interface to submit real system requirements including the choices in IP, packaging, manufacturing process, system voltage ... -
TVS extends CPU Verification Capability
Apr. 15, 2015 - TVS today announced an extension of its CPU verification capability. TVS provides expertise to help companies ensure their hardware and software based products are reliable, safe and secure. -
TVS extends Security Expertise through Associate Dr. Carol Buttle
Apr. 13, 2015 - TVS today announced a new associate Dr. Carol Buttle,DfSEC,DfASEP,FIAP,CCP to enhance the security offering asureSECURE -
eASIC Joins Hybrid Memory Cube Consortium
Apr. 07, 2015 - eASIC Corporation, a fabless semiconductor company that delivers a custom integrated circuit (IC) platform (eASIC Platform), today announced that it has joined the Hybrid Memory Cube Consortium. -
Synopsys Enables Continuous Debug Innovation with More Than 200 VC Apps Now Available on the Verdi Platform
Mar. 17, 2015 - Synopsys now has more than 200 debug and analysis apps available on the VC Apps Exchange portal and in the Verdi® VC Apps Toolbox, demonstrating rapid momentum for customized applications that drive continuous innovation and further enable system-on-chip (SoC) teams to address their debug challenges. ... -
Open-Silicon Appoints Margie Evashenk to Its Board of Directors
Mar. 16, 2015 - Margie Evashenk, an experienced engineering leader with over 25 years of experience in the networking and storage industry, specializing in ASIC development, joins Open-Silicon’s Board of Directors. -
T&VS and ESS announce strategic partnership to provide a complete security solution
Mar. 16, 2015 - T&VS and Embedded Security Solutions today announced a strategic partnership to provide asureSECURE a complete security solution from hardened SoC to software applications. -
SystemC-based UVM testing from TVS streamlines IP for Blu Wireless Technology
Mar. 12, 2015 - TVS today announced the successful completion of SystemC-based UVM software testing for Blu Wireless Technology. -
eASIC Passes Milestone of Shipping Twenty Million Custom ICs
Mar. 05, 2015 - eASIC, a fabless semiconductor company that delivers a custom integrated circuit (IC) platform (eASIC Platform), today announced that it has shipped over twenty million custom ICs. -
New AXI4 VIP Suite to improve FPGA and SoC reliability for ARM-based designs
Mar. 03, 2015 - -
eASIC and Comcores Announce Availability of CPRI v6.1
Mar. 02, 2015 - eASIC and Comcores today announced the immediate availability of the Common Public Radio Interface (CPRI) v6.1 for eASIC’s Nextreme-3 28nm devices. -
T&VS and Blackpepper Technologies announce strategic partnership to provide turnkey end-to-end SoC implementation services
Feb. 27, 2015 - T&VS, a leader in software test and hardware verification solutions, and Blackpepper Technologies, a leading silicon to system design service company, today announced a strategic partnership to provide turnkey end-to-end SoC implementation services. -
Brite Semiconductor Improves Quality of Results and Reduces Time to Market for Four SoC Designs with Cadence Digital Implementation and Signoff Tools
Feb. 27, 2015 - Cadence today announced that Brite Semiconductor Corporation, used Cadence® digital implementation and signoff tools to complete four 28nm system-on-chip (SoC) designs and reduced their time to market by three weeks compared to previous design methodologies. -
OneSpin Delivers First SystemC Assertion-Based Formal Verification Solution
Feb. 24, 2015 - OneSpin® Solutions today announced that OneSpin 360 DV™ now supports the SystemC language, delivering the first SystemC Assertion-Based Formal Verification Solution. -
Magillem partnering with Imperas: Enabling Internet of Things, using virtual platforms
Feb. 23, 2015 - Magillem announces its partnership with Imperas to leverage Imperas models in its X-Spec solution. -
TVS to showcase advanced verification solutions at DVCon USA 2015
Feb. 17, 2015 - TVS today announced that it will be exhibiting and presenting at DVCon, the premier event for design and verification engineers, in the US, March 2-5, 2015. -
TVS adds Design for Testability to services portfolio, enabling customers to reduce time to market
Feb. 02, 2015 - TVS, a leader in software test and hardware verification solutions, today announced a strategic expansion of its services with the addition of a new Design for Testability (DFT) business arm - asureDFT. -
Credo Conducts First Public Demonstrations of 28G and 56G NRZ SerDes Technology
Jan. 21, 2015 - Credo Semiconductor today announced it will conduct multiple demonstrations of its 28G and 56G NRZ SerDes technology at the upcoming DesignCon 2015 in Santa Clara, Calif. -
TVS adds web interface to its asureSIGN verification tool for real-time requirements management sign-off status
Jan. 14, 2015 - TVS today announced the addition of asureVIEWTM to the latest release of its asureSIGNTM management and verification tool. asureVIEW is a web based interface that allows asureSIGN to view real-time status of product requirement and test/coverage results. -
Synopsys Surpasses Milestone of 100 VC Apps on the Verdi Debug Solution
Dec. 15, 2014 - Synopsys today announced that the open Verdi® debug solution has achieved the milestone of more than 100 debug and analysis apps developed through the VC Apps open interfaces. -
TowerJazz Announces Successful Transfer of Fairchild Semiconductor’s Discrete Devices to TowerJazz Panasonic Semiconductor’s Japan Fab
Dec. 10, 2014 - TowerJazz announced today that Fairchild Semiconductor has started mass production at TowerJazz Panasonic Semiconductor Co.’s (TPSCo’s) fabrication facility in Tonami, Japan. This is a process transfer from Fairchild of their state of the art discrete devices for the industrial and consumer markets. ... -
Calypto Launches the Catapult 8 Platform: Third Generation High-Level Synthesis Technology
Dec. 03, 2014 - Calypto® Design Systems, Inc., a leader in low-power solutions and high-level design and verification, today launched the Catapult 8 platform, a third-generation, high-level synthesis (HLS) technology – the first in the industry.