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Silicon IP Catalog
Analog & Mixed Signal
A/D Converter (ADC)
10-Bit ADC
> Page 1

10-Bit ADC IP Core

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10-Bit ADC IP Listing

143 IP Cores (41 - 80)

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16-Channel 10-Bit 1MSPS ADC

The ll_adc2800s01_ln28lpp_7002 is a 1.8V/1.0V dual supply-voltage 10-bit analog-to-digital converter (ADC) with 16-channel analog input MUX and level-shifters for low-voltage digital interface. ...

41
A/D Converter IP, 10 bits, 40Msps, UMC 0.18um Mixed-Mode process

10-Bit 40MSPS Differential Analog-to-Digital converter, UMC 0.18um Mixed-Mode process.

42
A/D Converter IP, 10 bits, 400Ksps, UMC 0.25um Logic process

10-Bit 400KSPS single-end Analog-to-Digital converter, UMC 0.25um Logic process.

43
A/D Converter IP, 10 bits, 10Msps, UMC 0.18um G2 process

10-Bit 10MSPS Differential Analog-to-Digital converter, UMC 0.18um GII Logic process.

44
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, SAR type, UMC 0.11um HS/AE process

10-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux (All C-type), UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process.

45
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.13um LL/FSG process

10-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux, UMC 0.13um LL/FSG Logic process.

46
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.13um LL/FSG process

FXAnalog-to-Digital converter140HC0L with 8-to1 Mux, UMC 0.13um LL/FSG Logic process.

47
A/D Converter IP, 10 bits, 1Msps, UMC 0.13um LL/FSG process

UMC 0.13um LL/FSG process, 1MSPS 10-Bit SAR Analog-to-Digital converter with rail-to-rail input feature.

48
A/D Converter IP, 10 bits, 1Msps, UMC 0.153um SP process

10-Bit 1MSPS single-end Analog-to-Digital converter with 8-to-1 Mux, UMC 0.153um Logic/Mixed-Mode process.

49
A/D Converter IP, 10 bits, 40Msps, UMC 0.162um SP process

10-Bit 40MSPS 2-channel Differential Analog-to-Digital converter, UMC 0.162um Mixed-Mode Logic process.

50
A/D Converter IP, 10 bits, 40Msps, UMC 0.18um Logic/Mixed-Mode process

10-Bit 40MSPS 2-channel Differential Analog-to-Digital converter, UMC 0.18um Logic/Mixed-Mode process.

51
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.18um G2 process

10-Bit 1MSPS single-end Analog-to-Digital converter with 8-to1 Mux, UMC 0.18um GII Logic process.

52
A/D Converter IP, 10 bits, 80Msps, UMC 0.18um Logic/Mixed-Mode process

10-Bit 80MSPS Differential Analog-to-Digital converter, UMC 0.18um Logic/Mixed-Mode process.

53
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 55nm SP process

10-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux (all C-type), UMC 55nm SP/RVT Low-K Logic process.

54
A/D Converter IP, 10 bits, 1Msps, UMC 65nm LL process

1MSPS 10-Bit SAR Analog-to-Digital converter, UMC 65nm LL/RVT Low-K Logic process.

55
A/D Converter IP, 10 bits, 40MHz, UMC 90nm LL process

UMC 90nm LL/RVT Low-K process, 1.2V/Bi-channels 40MHz 10-Bit Pipelined Analog-to-Digital converter.

56
A/D Converter IP, 10 bits, 1Msps (Max clock rate: 13MHz), with 8-to-1 input MUX, UMC 90nm SP process

FXAnalog-to-Digital converter143HD0A with 8-to1 Mux for FTC, UMC 90um SP/RVT Low-K Logic process.

57
A/D Converter IP, 10 bits, 10Msps - 50Msps, UMC 0.11um HS/AE process

1.2V/3.3V 10-Bit 10MSPS-50MSPS Pipelined Analog-to-Digital converter with optional power scalable, UMC 0.11um HS/AE Logic process.

58
10-bit 1-channel 1 MSPS SAR ADC

The 10-bit ADC has an architecture of successive approximation analog to digital converter circuit.

59
9-bit 2-channel 0.5 to 33 MSPS (8 to 500 kHz BW) delta-sigma ADC

The block is second order delta-sigma ADC with 5-level quantizer. The block consists of: - two integrating cascades based on switch capacitors technique; - 5-level flash-ADC; ...

60
10-bit 1-channel 100 MSPS ADC

The 10-bit 100 MSPS ADC employs a high-performance front-end sample-and-hold with differential multi-stage pipelined architecture and output error correction logic. The biasing circuit and the ...

61
10-bit 4-channel 5 to 100 MSPS pipeline ADC

065TSMC_ADC_09 employs a high-performance front-end sample-and-hold with differential multistage pipelined architecture and output error correction logic. The reference generator, current source ...

62
12-bit 2-channel 5 to 7.5 MSPS cascade delta-sigma ADC

The block is third order cascade (2-1) delta-sigma ADC with 5-level quantizer in both stages. The block consists of: - Two delta-sigma modulators second and first order, coupled in series and ...

63
Low-Power 10-bit SAR ADC - 10 bits, 240kSPS, 8 multiplexed inputs LFoundry 0.15 μm

This macro-cell is a general purpose, 10-bit, 240kSPS, 8-multiplexed input Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) core designed for LFoundry 0.15µm LF150 ...

64
10-bit 50kSPS SAR ADC - 10 bits, 50kSPS, 4 multiplexed inputs XFAB 0.35 μm

This macro-cell is a low power, general purpose, 10-bit, 50kSPS, Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) core designed for X-FAB 0.35µm XH035 CMOS technology. ...

65
10bit 300KHz SAR ADC (Vcc=3.3V,DNL:+/-1LSB, INL:+/-2LSB)

0.18um CMOS technology ; 10bit Resolution with low power ; Differential Non-Linearity Error: +/- 1 LSB ; Integral Non-Linearity Error: +/- 2 LSB ; Maximum conversion rate: 300KSPS ; Low Power ...

66
10bit 100MHz Pipe Lined ADC (Vcc=2.5V,DNL: +/-1LSB, INL:+/-2LSB)

0.18um CMOS technology ; 10bit Resolution with low power ; Differential Non-Linearity Error: +/- 0.5 LSB ; Integral Non-Linearity Error: +/- 1LSB ; Maximum conversion rate: 100MSPS ; Low Power ...

67
10bit 300KHz SAR ADC (Vcc=3.3V,DNL:+/-1LSB, INL:+/-2LSB)

0.13um CMOS technology (Chartered Semiconductor) ; 10bit Resolution with low power ; Differential Non-Linearity Error: +/- 1 LSB ; Integral Non-Linearity Error: +/- 2 LSB ; Maximum conversion ...

68
ADC 10-bit pipeline 110Mhz 3.3V

This Analog -to-Digital converter IP has a monolithic differential pipelined architecture with output error correction logic providing 10 bits conversion accuracy from 10 up to 110 Mhz sampling ...

69
10-bit 55 MHz Pipelined ADC

70
10-bit 1 MHz SAR ADC

71
10-bit 50 MSPS Fully differential Pipelined ADC

72
10-bit 500 KSPS single-ended SAR ADC

73
Triple HD-video AFE digitizer - 10bits/170Mhz - 8bits/205Mhz

This macro is a triple-channel, 8/10-bits video analog front end (AFE) that incorporates all of the functions required to digitize High Definition YpbPr/YUV (component) video signals and RGB ...

74
10 bit 4Msps ADC in TSMC 0.25um

Ridgetop Group’s 10-bit, 4 MS/s ADC core utilizes a pipeline architecture in the TSMC 0.25 μm process. The ADC converter design is 10-bit 4 MS/s, as shown in Figure 1. The cell incorporates ...

75
Video ADC - 10bit 40MHz

10bit 40MHz

76
SAR ADC - 10bit 500KHz ADC

10bit 500KHz ADC

77
Touch-Screen - 10bit ADC

10bit ADC

78
10-bit 167MSPS A/D converter

AGAD12 is a 10bit 167MSPS Pipeline A/D converter. The ADC is very simple to use, neither use calibration nor trimming.

79
10bit 100MSPS A/D converter

AGAD11 is a 10bit 100MSPS pipeline A/D converter. The ADC not require additional capacitor process can be used in standard logic process. The ADC is very simple to use, neither use calibration ...

80

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