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横浜ブルーバード IP Listing

18460 IP Cores (6921 - 6960)

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Read-Modify-Write Core

The Read-Modify-Write (RMW) Core from Rambus handles misaligned bursts when an Error Correction Code (ECC) is being used. An ECC code word must be calculated over an entire data word. Misaligned ...

6921
Multi-Port Front-End

The Rambus Multi-Port Front-End Core from Rambus provides a multi-port interface to Rambus Memory Controller Cores. Each user request is provided with its own request priority. The arbiter ...

6922
I2C Host / Device Bus Controller

The synchronous I2C interface is a block that interconnects an APB bus. The APB - I2C Bridge interfaces to the APB bus on the system side and the I2C bus. The APB interface is used to easily ...

6923
1.25 Gbps Four-Channel (4CH) LVDS Serializer with Pre-emphasis

The MXL-LVDS-TX-4CH is a high performance 4-channel LVDS Transmitter implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels. The parallel ...

3 Testimonials
Silent Liu, Vice President of Engineering, SuperD

6924
1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI

The 4-Channel LVDS Deserializer is a high performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels. ...

4 Testimonials
Rainer Schweer, CEO, Thomson, now Viimagic GmbH

6925
Programmable Keyboard / Display Interface

The Digital Blocks DB8279 Programmable Keyboard / Display Interface core is a full function equivalent to the Intel 8279 / Mitsubishi 8279 / NEC uPD8279 devices. The DB8279 RTL Verilog / ...

6926
Programmable Peripheral Interface

The Digital Blocks DB8255A Programmable Peripheral Interface IP core is a full function equivalent to the Intel 8255A / 82C55A and Harris / Intersil 82C55A devices. The DB8255A RTL Verilog ...

6927
P1619/802.1ae (MACSec) GCM/XEX/XTS-AES Core

General Description LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 uses the XEX/XTS mode. Since GCM and XEX/XTS ...

6928
Combo P1619 / 802.1ae (MACSec) GCM-AES/LRW-AES Cores

LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 uses the LRW mode. Since AES-GCM and AES-LRW share some of their ...

6929
Pipelined High Performance Microcontroller

The DP80C51 is an ultra high performance, speed optimized soft core, of a single-chip 8-bit embedded controller, intended to operate with fast (typically on-chip) and slow (off-chip) memories. ...

9 Testimonials
Liuyadong, SoC Director, Brite Semiconductor

6930
I2C Bus Interface - Master/Slave

The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many devices. The DI2CMS core provides an interface ...

3 Testimonials
Markus Wettstein, , Zühlke Engineering AG

6931
SONET/SDH VT/TU Mapper

Aliathon’s VT/TU Mapper performs the insertion and extraction of PDH signals into or from multiple VT/TU paths. The core handles pointer generation and signal insertion into the transmitted ...

6932
1553EBR Remote Terminal

SAE AS5682 is a 10 Mbps command/response, dual redundant, enhanced bit rate (EBR), time-multiplexed serial data bus used in aircraft, spacecraft, military vehicles, and severe control environments. ...

6933
Coordinate Rotation Digital Computer (CORDIC) engi

CoreCORDIC is an Microsemi FPGA-optimized Coordinate Rotation Digital Computer (CORDIC) engine. The CORDIC algorithm by J. Volder provides an iterative method of performing vector rotations ...

6934
Deeply embedded processor for deterministic real-time applications

The Cortex-R4 processor delivers high-performance, real-time responsiveness, reliability, and dependability with high error-resistance. It offers excellent energy efficiency and cost effectiveness ...

6935
Open source version of the UltraSPARC T1 processor

OpenSPARC T1 is the open source version of the UltraSPARC T1 processor. The UltraSPARC T1 processor with CoolThreads technology is the highest-throughput and most eco-responsible processor ever ...

6936
SHA-1 Secure Hashing Algorithm

The Secure Hashing Algorithm (SHA-1) core was implemented in compliance with Federal Information Processing Standards (FIPS) Publication 180-2: Secure Hash Standard.

6937
Multiplier

The multiplier operation is essential and abundant in DSP Applications. Achieving maximum implementation efficiency and clock performance is therefore critical to DSP systems and frequently ...

6938
OFDM Modem

OFDM baseband processor for UWB applications. UWB WPAN’s provide very high data rate, short range, and low power communications. Typical requirements include an ability to achieve a 200 ...

6939
100mA 3.3V to 1.8V regulator - SMIC 0.18um

3.3V to 1.8V linear voltage regulator for up to 100mA.

6940
LDO regulator - SMIC 0.18um

Regulator with low drop-out voltage.

6941
Low-noise bandgap reference - TowerJazz 0.18um

Low-noise bandgap reference

6942
ASI

6943
RLDRAM II Controller

The RLDRAM II Controller MegaCore® function handles the complex aspects of using RLDRAM II?initializing the memory devices and translating read and write requests from the local interface into ...

6944
SDI Video Interface

6945
SerialLite II

The SerialLite II MegaCore® function provides a simple and lightweight way to move data from one point to another reliably, at high speeds. It consists of a serial link of up to 16 bonded ...

6946
Video and Image Processing Suite

The Altera® Video and Image Processing (VIP) Suite is a collection of MegaCore® functions that you can use to facilitate the development of custom video and image processing designs. These ...

6947
Power-on reset for 1.8V. - UMC 0.18um

Power-on reset circuit monitoring 1.8V supply.

6948
16 bits sigma-delta ADC - UMC 0.18um

16 bits 40kS/s sigma-delta ADC.

6949
8 bits 160MS/s pipeline ADC - 0.25um

8 bits 160MS/s pipeline ADC

6950
Power-on reset for 3.3V - SMIC 0.18um

Power-on reset circuit monitoring 3.3V supply

6951
60mA 3.3V to 1.8V regulator - UMC 0.18um

3.3V to 1.8V linear voltage regulator for up to 60mA load.

6952
20mA 3.3V to 1.8V regulator - SMIC 0.18um

3.3V to 1.8V linear voltage regulator for up to 20mA load.

6953
Avalon Multi-port SDRAM Memory Controller IP Core

The Avalon Multi-port SDRAM Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in Avalon® multi-master streaming data systems. Advanced design ...

6954
Tri-Speed Ethernet MAC Core IP

The Tri-Speed Ethernet Media Access Controller (TSMAC) IP core can be configured to operate in either the Gigabit mode (1000Mbits/sec data rate) or the Fast Ethernet mode (10/100 Mbits/sec data ...

6955
HiGig Ethernet MAC

The HiGig™ MAC transmits and receives data between a host processor and a HiGig™ / Ethernet network that enables networking customers to add features like quality of service (QoS), ...

6956
Soft Error Detection

Soft errors occur when high-energy charged particles alter the stored charge in a memory cell in an electronic circuit. The phenomenon first became an issue in DRAM, requiring error detection ...

6957
Peripheral Interface Adapter (PIA)

The following information applies to both the Chip and Core versions of this 65xx brand microprocessor family member. WDC's high volume production proven 65xx brand microprocessor family ...

6958
Asynchronous Communications Interface Adapter (ACIA)

The following information applies to both the Chip and Core versions of this 65xx brand microprocessor family member. WDC's high volume production proven 65xx brand microprocessor family ...

6959
Crystal oscillator - UMC 0.18um

Crystal oscillator 32.768KHz

6960

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