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느조스의 껍질 가는법 IP Listing

18549 IP Cores (6921 - 6960)

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Dual Port SRAM Compiler IP, UMC 0.13um SP/FSG process

UMC 0.13um SP/FSG Logic process high density synchronous high density Dual Port (2RW) SRAM memory compiler.

6921
Dual Port SRAM Compiler IP, UMC 0.13um HS/FSG process

UMC 0.13um HS/LL fusion (FSG) process high density synchronous high density Dual Port (2RW) SRAM memory compiler.

6922
Single Port SRAM Compiler IP, UMC 0.13um SP/FSG process

UMC 0.13um SP/FSG Logic process high density synchronous high density Single Port SRAM memory compiler.

6923
Single Port SRAM Compiler IP, UMC 0.13um HS/FSG process

UMC 0.13um HS/LL fusion (FSG) process high density synchronous high density Single Port SRAM memory compiler.

6924
One Port Register File Compiler IP, UMC 0.13um SP/FSG process

UMC 0.13um SP/FSG Logic process high density synchronous Single Port Register File SRAM memory compiler.

6925
Two Port Register File Compiler IP, UMC 0.13um SP/FSG process

UMC 0.13um SP/FSG Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler.

6926
Linear Regulator IP, Output: 3.3V/100mA, UMC 0.15um SP process

3.3V with 100mA driving capability, Istb=65uA Linear Regulator, UMC 0.15um SP Logic process.

6927
Band Gap IP, Input: 1.0V - 1.8V, VBG=0.615V, UMC 0.18um LL process

VBG=0.615V, VCCA=1.8V, VCCA_min=1.0V, Ivcca=23uA, UMC 0.18um LL Logic process.

6928
Voltage Detector IP, UMC 0.18um LL process

VDT for MMC, UMC 0.18um LL Logic process.

6929
Voltage Detector IP, UMC 0.18um LL process

Voltage detector for flash protect, UMC 0.18um LL Logic process.

6930
Linear Regulator IP, Output: 3.3V/240mA, UMC 0.18um LL process

3.3V with 240mA driving capability, Istb=uA Linear Regulator, UMC 0.18um LL Logic process.

6931
General Purpose Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 0.18um G2 process

UMC 0.18um GII Logic process standard Multi-Voltage IO.

6932
Specialty SSTL IO IP, UMC 0.18um G2 process

UMC 0.18um GII Logic process true 2.5V SSTL2 IO cells.

6933
Specialty PECL IO IP, UMC 0.18um G2 process

UMC 0.18um GII Logic process Low Voltage true 3.3V PECL IO cells.

6934
Specialty PCI IO IP, UMC 0.18um G2 process

UMC 0.18um GII Logic process true 3.3V PCI IO cells.

6935
Audio ADDA IP, 18 bits, 96KHz, UMC 0.25um Logic process

18-Bit 96KHz Sigma-Delta audio Codec, UMC 0.25um Logic process.

6936
Audio ADDA IP, 18 bits, 96KHz, UMC 0.25um Logic process

18-Bit 96KHz Sigma-Delta audio Codec, UMC 0.25um Logic process.

6937
10/100 Mb Media Access Controller

Our innovative solution is a hardware implementation of media access control protocol defined by the IEEE standard. DMAC in cooperation with external PHY device enables network functionality ...

2 Testimonials
Josef Börcsök, Prof. Dr -Ing. habil. , Universität Kassel

6938
SD/SDIO Device Controller

A compact low power and scalable IP core which provides a simple, firmware-friendly cost-effective Physical Link interface for memory, i/o and combo devices, such as SD-based memory cards, Mini ...

6939
MMC Target Controller

A compact low power and scalable IP core which provides a simple, firmware-friendly cost-effective Physical Link interface for MultiMediaCard-based memory and i/o devices, such as MMC memory ...

6940
ATA-7 (UDMA 133) Target Interface

This is a ATA-7 compliant device interface core used for interfacing custom devices to IDE controller. Core is targeted for SOC implementations in ASIC and FPGA.

6941
64/256 state block Viterbi decoder

The VA08S is a low complexity 64 or 256 state error control decoder using the maximum likelihood Viterbi algorithm. The decoder is designed to efficiently decode short block lengths with maximum ...

6942
Phase Locked Loop (PLL) Frequency Synthesizer Core

For general purpose Phase Locked Loops (PLL), ASIC designers have to rely on analog VCOs until today. Now Cologne Chip has come up with a fully digital approach: C3-PLL-2, an IP core for frequency ...

6943
DVB-S2 demodulator

The CMS0014 has been designed from the ground-up for high-speed and gate-efficient implementation on FPGA and ASIC platforms and offers "near Shannon limit" performance when combined with an ...

6944
FFT Processor for Microsemi FPGA

Fast Fourier Transform (FFT) Filter Generator CoreFFT v6.4 makes use of multiply-accumulate blocks embedded on-chip in Microsemi's PolarFire, SmartFusion2, IGLOO2 and RTG4 FPGA devices to ...

6945
ARM9 compatible Microcontroller Core (ARM9xxT, ARM9xxE)

Binary Compatible to standard ARM9TDMI ; Patent free ; Single Clock, fully Static Design ; 32 Bit RISC Architecture ; JTAG Test Port ; AMBA Bus Master ; AMBA AHB Bus Interface ; 200 MHz Clock ...

6946
Advanced Encryption Standard En- / Decryption IP-Core

The Advanced Encryption Standard (AES) specifies an approved cryptographic algorithm that can be used to protect electronic data. It is a symmetric block cipher that can encrypt (encipher) and ...

6947
USB OTG Function Controller

USB OTG Function Controller is a highly integrated USB OTG solution for USB OTG applications. SI22USBOTG11 is a USB OTG Function Controller Core designed as per USB OTG specification, which ...

6948
Ethernet Statistics

A Free parameterizable core that can be used with Gigabit Ethernet MAC, soft and Embedded Tri-Mode Ethernet MAC Cores. Xilinx offers a parameterizable Ethernet Statistics core for ...

6949
SDIO/SD Memory/MMC Host Controller

The SDIO/SD Memory/MMC Host Controller IP Core is a host controller for SD memory card, SDIO and MMC interface. The core connects the host CPU of the system to the SD card socket. SD memory ...

6950
64-bit PCI-X Host Bridge

The EP423 64-bit PCI-X host bridge core is optimized to operate in both PCI mode and PCI-X mode. The user interface is a highly efficient and flexible user interface which provides for easy ...

6951
64-bit PCI-X Master/Target

Fully supports PCI and PCI-X protocol. ; Designed for ASIC and PLD implementations. ; Fully static design with edge triggered flip-flops. ; Efficient user interface for different types of ...

6952
Compactflash/PCMCIA Slave Controller

The PCMCIA Card Slave is to be used inside a PCMCIA card. This module interface with the PCMCIA card signals on one side and a user interface on this other side. The PCMCIA card input is sampled ...

6953
Embedded Tri-mode Ethernet MAC Wrapper

The CORE Generator™ Embedded Tri-mode Ethernet Media Access Controller (MAC) Wrapper automates the generation of HDL wrapper files for the embedded Tri-mode Ethernet MAC in Virtex™-4 FX ...

6954
OPB/PLB PCI32 Interface

The OPB to PCI 32/33 Bridge is offered as an evaluation core in the EDK. To generate a full OPB to PCI license, the PCI-32 LogiCORE must be purchased. The OPB IPIF/ V3 PCI Core Bridge ...

6955
Floating-Point Operator

The extended dynamic range and precision offered by floating-point arithmetic is quickly becoming a requirement in numerous signal processing algorithms that are being used in graphics, advanced ...

6956
Distributed Memory Generator

The Distributed Memory Generator is provided under the terms of the Xilinx End User License and is included with ISE® and Vivado™ design tools at no additional charge. The Distributed ...

6957
32-bit & 64-bit Initiator/Target for PCI Product Bundle

DO-DI-PCI-AL rolls both the 32-bit and 64-bit Initiator/Target for PCI™ LogiCORE™ IP cores together into one convenient bundle. This product enables designers to build customized 32-bit ...

6958
32-bit Initiator/Target for PCI

32-bit Initiator/Target for PCI™ enables designers to build a customized 32-bit system running at speeds up to 66 MHz that performs at 264 Mbytes per second and with up to 300,000 system gates. ...

6959
32-bit Initiator/Target for PCI Single Project Spartan Series

32-bit Initiator/Target for PCI™ Single Project Spartan® family enables designers to build a customized 32-bit system running at speeds up to 66 MHz that performs at 132 Mbytes per second ...

6960

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