Functionality
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14b or 16b single-ended ADC. 10MSPS. Must include high input impedance driver circuitry. Ideally operational over 3.3V, but will consider operation over 1.5V.
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External compatibility and integration requirements
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Serialized CMOS output.
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Timing or Performance requirements
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<100ns settling time. 10MSPS sample rate.
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Technology Requirements
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TSMC 0.13 CMOS Mixed Signal MS Low Power Standard Process. 1.5V/3.3V.
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Availability Timing
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Delivery by February 2023
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Quality requirement
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Full Characterization Report. Passes DRC/LVS. Passes simulation with R-C-CC extracted design over all process corners and Monte-Carlo.
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Business Scheme Requirement
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Deliver all items required for integration, verification and tape-out.
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English
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