Functionality
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EO Sensor Support: Connection to 2+ of the same CMOS Image Sensors (MIPI or LVDS) or Multi-Stream from Single CMOS Sensor (SLVS-EC)
Resolution Supports: 64MP (desired), 8MP+ (min. required)
Input Video Formats: Raw Bayer, RGB and YCbCr (8, 10, 12-bit per color)
Image Sensor Interface (Rx): MIPI CSI-2, LVDS, or SLVS-EC
Host Device Interface (Tx): MIPI CSI-2 or LVDS
HDR: TBD
ISP Functionality:
Lens Shading Correction
Defective Pixel Correction
Color Filter Array Interpolation
AWB & AE
Color Correction
Gamma Corrections
Image Enhancement
Noise Reduction
Low Light Optimization
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External compatibility and integration requirements
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Image Sensor Interface (Rx): MIPI CSI-2, LVDS, or SLVS-EC
Host Device Interface (Tx): MIPI CSI-2 or LVDS
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Timing or Performance requirements
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up to 2.5Gbps
Low Latency
Soft Standby/Soft Reset
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Technology Requirements
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Multi Rx Input
Single Tx Output (ability to select CMOS sensor for output)
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Availability Timing
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ASAP
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Business Scheme Requirement
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We are interested in finished IP or leveraged IP which requires minimal modifications. We are amenable to licensing or purchasing the pre-flashed/programmed and QC tested FPGA/ASIC.
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English
(mail
this request to a colleague) 