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New Products

Deepmentor
DeepLogCore® – Ultra-Low Power, High-Efficiency Vision Edge AI Object Detection Accelerator (CNN/YOLO Optimized)
Dream Chip Technologies GmbH
Image Signal Processing, Real-time Pixel Processor: High resolution Consumer
T2M GmbH
32-bit RISC-V General-Purpose IoT Microcontroller Core, Comparable to Cortex M33
Tenstorrent
Tensix NEO RISC-V-based AI IP For Extraordinary AI Performance
Alphacore, Inc.
6-12-bit, Gen Analog-to-Digital Converter (ADC) IP block

Blogs

RISC-V and AI/ML redefining the future of Edge Computing
MosChip Technologies, USA
Ambuj Nandanwar
MosChip Technologies, USA
JESD204 Frame Mapping explained from converter samples to lanes
Chip Interfaces ApS
Piotr Koziuk
Chip Interfaces ApS
Starting the new year with a fresh focus on novel analog IP
Agile Analog
Krishna Anne, CEO
Agile Analog
Why Chiplets Are Key to Next-Gen Software-defined Vehicles
Arm Ltd.
Arm Ltd.
Top 5 trends you can expect from CES 2026 in Las Vegas
Arm Ltd.
Arm Editorial Team
Arm Ltd.
Maven Silicon & iHUB DivyaSampark, IIT Roorkee Collaboration
Maven Silicon
Maven Silicon
Physical AI at the Edge: A New Chapter in Device Intelligence
Ceva, Inc.
Iri Trashanski
Ceva, Inc.
The sixth sense of automotive safety: How radar is guiding the future of driving
Sneha Narnakaje
GlobalFoundries
Adapting Foundation IP to Exceed 2 nm Power Efficiency in Next-Gen Hyperscale Compute Engines
Synopsys, Inc.
Andrew Appleby, Daryl Seitzer
Synopsys, Inc.
UA Link PCS customizations from 800GBASE-R Ethernet PCS Clause 172
Chip Interfaces ApS
Piotr Koziuk
Chip Interfaces ApS
Inside GF’s decarbonization journey
Joseph Chia
GlobalFoundries
How Arm is redefining compute through the converged AI data center
Dermot O'Driscoll
Arm Inc.

Articles

Security certification and the crucial role of anti-tamper sensor solutions
Agile Analog
Chris Morrison
Agile Analog
Beyond the Core: Tackling system-wide debugging for complex SoCs with Tessent UltraSight
Siemens - Tessent Embedded Analytics
Francisca Tan, Senior Product Manager
Siemens - Tessent Embedded Analytics
Three Ethernet Design Challenges in Industrial Automation
Key ASIC
Key ASIC
ST silicon photonics and BiCMOS technologies: the winning portfolio for AI optical interconnects
STMicroelectronics
STMicroelectronics
AI in VLSI Physical Design: Opportunities and Challenges
Japesh Kumar, Qualcomm
AI-Driven and Traditional Approaches to Accident Scenario Reconstruction
Vayavya Labs
Nitin Swamy
Vayavya Labs
From Theory to the Field: Why Side-Channel Protection Defines Post-Quantum Security
PQSecure Technologies
PQSecure Technologies
PCIe 5.0: The universal high-speed interconnect for High Bandwidth and Low Latency Applications Design Challenges & Solutions
Innosilicon Technology Ltd
Innosilicon Technology Ltd
Design Approaches and Architectures of RISC-V SoCs
Maven Silicon
Maven Silicon
Implementation of Metal ECO using Mask Programmable Cell for Hold Timing Violations
eInfochips, Inc.
Dhanyakumar Shah,Dharmik Lakhani
eInfochips, Inc.
Unlocking the Power of Digital Twins in ASICs with Adaptable eFPGA Hardware
Menta
Menta
Bridging Design Verification Gaps with Formal Verification
Karim Waseem, Si-vision
Asic Technology
Select your target foundry and technology
FPGA and eFPGA Corner
Select your target vendor and device
Today on Design And Reuse

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