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Shikino High-Tech Co., Ltd.
JPEG XL series
AiM Future, Inc.
GAIA Edge AI/ML Accelerator IP Series
Robert Bosch GmbH
DFA - Data Flow Architecture IP
Xiphera Ltd
nQrux® Root of Trust with Post-Quantum Cryptography
TES Electronic Solutions
Low Power 32kHz Pierce Oscillator

Blogs

Can Smart Factory Solutions Solve the Visibility Challenges Created by Legacy Systems?
MosChip Technologies, USA
Sombabu Gunithi
MosChip Technologies, USA
Why perfect crypto inventory stalls quantum readiness
PQShield
PQShield
Scaling Sandboxed Agentic AI on Xeon CPUs
Nithya Rao
BEVFormer-Tiny on Chimera: Bird's-Eye-View Perception in One GPNPU Kernel
Quadric
Quadric
Heterogeneous Computing in Space
BrainChip
Dr. Jonathan Tapson
BrainChip
SerDes, Ethernet and the silicon that connects them: Why SerDes for high-bandwidth sensors?
Yuichi Motohashi
GlobalFoundries
Tape-Out Readiness Checklist: Engineering Decisions That Prevent Costly Respins
MosChip Technologies, USA
Raghuveer Reddy
MosChip Technologies, USA
Is Your Android Product Development Built to Scale Beyond One Product?
MosChip Technologies, USA
Shivi Makrariya
MosChip Technologies, USA
AMBA C2C: Moving forward with a converged AMBA foundation for C2C connectivity
Arm Ltd.
Francisco Socal
Arm Ltd.
Can Remote Equipment Monitoring Move Beyond Alerts to Autonomous Action?
MosChip Technologies, USA
Darshil Shah
MosChip Technologies, USA
UALink over UCIe 3.0: Maximizing Performance for Chiplet-based Designs
Siemens EDA
Mundru Sriram Bhaskar Teja
Siemens EDA
From Bug Hunting to Engineering Methodology: Lessons from AI-Driven Development
Arteris
Alexandre Manuel and Julia Baucher
Arteris

Articles

Directory-Based Coherency at Scale: From 8 Cores to 256 Agents
Signature IP Corporation
Signature IP Corporation
Clock Domain Crossing Sign-Off with Microarchitecture Analysis: 20X Better Precision
Real Intent
Vikas Sachdeva, Sr. Director
Real Intent
Coherent vs Non-Coherent Fabrics: Choosing the Right NoC for Your SoC
Signature IP Corporation
Signature IP Corporation
Multiple neuromorphic chips, one grid, no new middleware
BrainChip
Nikunj Kotecha
BrainChip
Harnessing the power of AMBA CHI: The Protocol Powering Modern CPU Clusters
Signature IP Corporation
Signature IP Corporation
Why Open-Source Software Is Essential in the Software-Defined Vehicle Era
Renesas
Hisao Munakata
Renesas
Detect, Diagnose, and Debug using Sensors and Functional Monitoring
Siemens EDA
Siemens EDA and Movellus
Siemens EDA
Practical AI Silicon on Mainstream Node using LPDDR
OPENEDGES Technology, Inc.
OPENEDGES Technology, Inc.
From Specification to Silicon: Using PUFrt to Address Caliptra Root of Trust Integration Challenges
eMemory Technology Inc.
eMemory Technology Inc.
Cache Coherency 101: Why It Matters in Multi-Core SoCs
Signature IP Corporation
Signature IP Corporation
Why SoC Interconnects Have Outgrown the Bus
Signature IP Corporation
SignatureIP Engineering Team
Signature IP Corporation
High-Speed SerDes Design: Architecture, Equalization, and CDR Circuits
MosChip Technologies, USA
Vivek Babu Avuri
MosChip Technologies, USA
Asic Technology
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Today on Design And Reuse

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bullet_arrow  INTERA Launches EAGLE Cognit, Bringing Ultra-Low-Power Near-Memory AI Acceleration to Next-Generation Edge Devices - October 15, 2026

bullet_arrow  GlobalFoundries selected to operate two new semiconductor fabs in New York under landmark U.S.-Japan initiative - October 15, 2026

bullet_arrow  GlobalFoundries Returns to Advanced-Node Race With 7 nm-Class FDX Fusion - October 15, 2026

bullet_arrow  Cadence Wins Five 2026 TSMC OIP Partner of the Year Awards - October 15, 2026

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