English
Smart partitioning in WiMAX radios illustrates design challenges, Part 1
By Noman Rangwala and Tom Gratzek, Analog Devices, Inc.
Oct 13, 2006 (9:26 AM), Planet Analog
Deciding how to split mixed-signal functions between two or more die is a complex exercise in balancing design tradeoffs, as this WiMax design shows
The promised advantages of digital technology are only as good as the ability of the analog technologies to faithfully translate the digital language of 1s and 0s into natural analog signals. The advance of the digital revolution has been characterized by Moore's law, which states that the number of transistors on a chip doubles every 18 months.
Analog technologies, on the other hand, are characterized by Murphy's Law—if anything can go wrong, it will. Analog technologies progress at a more measured pace dictated not by process enhancements but by innovations in circuits and physical transistor modeling. These technologies improve incrementally on multiple dimensions of performance, power, and integration.
Integration trends and the case for partitioning
Integration trends are a function of volume and system maturity; in many cases system acceptance and unit volume production never grow to justify recurring generational development. In other applications, such as base stations, instrumentation, and military applications, stringent performance requirements lead to discrete implementations. In cases such as cellular and Wi-Fi, where consumer acceptance is universal, competitive forces drive the continual cost reduction.
As technology becomes more expensive to deploy (such as mask, tool, and engineering costs), the return needed to justify these developments increases. At the same time, competitive forces drive companies to invest heavily early in a standard's life cycle. If a market takes off, and a company's chipset is not ready, the financial result can be dire.
In essence, companies are forced to invest to be ready when a market takes off, and this investment is increasingly expensive, while at the same time, customers are requiring more performance from their suppliers. Obtaining an acceptable return on the R&D investments required to build today's complex communication systems is a very tricky proposition. Depending on the complexity of the SOC—development costs can easily range from $10 to $20 million, and higher, for a 90 nm design.
Thus, success of a new initiative depends on identifying a market where your IP is valuable and then lining up partners to meet customer needs. Fewer and fewer companies are able to handle all aspects of a system development. However, focus on performance cost, time to market (TTM), and financial payback is an absolute requirement.
For emerging communications applications like WiMAX, the first generation systems have typically been developed using multiple ICs. The MAC/modem section may use FPGAs and off-the-shelf DSPs; the RF sections often use discrete components such as LNAs, mixers, and synthesizers, with the ADCs and DACs bridging the gap. As volumes grow, the digital logic is often integrated together on a dedicated ASIC and, in some cases, the ADCs/DACs are included on this digital ASIC, for use with more integrated RF solutions.
For other applications with size constraints, such as mobile phones or USB dongles, the analog and digital functionality can be integrated together, either in one system in a package using multichip modules, or on a single chip. There are many different ways to drive to lower size and cost, but the trend is that as volumes increase, size and cost decline. In some cases, cost is king and RF performance can be sacrificed (i.e., some WLAN consumer applications), although customers don't realize it. In other cases, size is paramount, and integration of functionality is the driver.
There is no one recipe for success. Companies have been successful with many different integration and cost reduction strategies. To be clear, development choices must be made that minimize electronic bill of materials (eBOM), size, and TTM. Intelligent design of system partitioning is instrumental in achieving success.
Oct 13, 2006 (9:26 AM), Planet Analog
Deciding how to split mixed-signal functions between two or more die is a complex exercise in balancing design tradeoffs, as this WiMax design shows
The promised advantages of digital technology are only as good as the ability of the analog technologies to faithfully translate the digital language of 1s and 0s into natural analog signals. The advance of the digital revolution has been characterized by Moore's law, which states that the number of transistors on a chip doubles every 18 months.
Analog technologies, on the other hand, are characterized by Murphy's Law—if anything can go wrong, it will. Analog technologies progress at a more measured pace dictated not by process enhancements but by innovations in circuits and physical transistor modeling. These technologies improve incrementally on multiple dimensions of performance, power, and integration.
Integration trends and the case for partitioning
Integration trends are a function of volume and system maturity; in many cases system acceptance and unit volume production never grow to justify recurring generational development. In other applications, such as base stations, instrumentation, and military applications, stringent performance requirements lead to discrete implementations. In cases such as cellular and Wi-Fi, where consumer acceptance is universal, competitive forces drive the continual cost reduction.
As technology becomes more expensive to deploy (such as mask, tool, and engineering costs), the return needed to justify these developments increases. At the same time, competitive forces drive companies to invest heavily early in a standard's life cycle. If a market takes off, and a company's chipset is not ready, the financial result can be dire.
In essence, companies are forced to invest to be ready when a market takes off, and this investment is increasingly expensive, while at the same time, customers are requiring more performance from their suppliers. Obtaining an acceptable return on the R&D investments required to build today's complex communication systems is a very tricky proposition. Depending on the complexity of the SOC—development costs can easily range from $10 to $20 million, and higher, for a 90 nm design.
Thus, success of a new initiative depends on identifying a market where your IP is valuable and then lining up partners to meet customer needs. Fewer and fewer companies are able to handle all aspects of a system development. However, focus on performance cost, time to market (TTM), and financial payback is an absolute requirement.
For emerging communications applications like WiMAX, the first generation systems have typically been developed using multiple ICs. The MAC/modem section may use FPGAs and off-the-shelf DSPs; the RF sections often use discrete components such as LNAs, mixers, and synthesizers, with the ADCs and DACs bridging the gap. As volumes grow, the digital logic is often integrated together on a dedicated ASIC and, in some cases, the ADCs/DACs are included on this digital ASIC, for use with more integrated RF solutions.
For other applications with size constraints, such as mobile phones or USB dongles, the analog and digital functionality can be integrated together, either in one system in a package using multichip modules, or on a single chip. There are many different ways to drive to lower size and cost, but the trend is that as volumes increase, size and cost decline. In some cases, cost is king and RF performance can be sacrificed (i.e., some WLAN consumer applications), although customers don't realize it. In other cases, size is paramount, and integration of functionality is the driver.
There is no one recipe for success. Companies have been successful with many different integration and cost reduction strategies. To be clear, development choices must be made that minimize electronic bill of materials (eBOM), size, and TTM. Intelligent design of system partitioning is instrumental in achieving success.
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