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55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
Accelerating Architecture Exploration for FPGA Selection and System Design
By Deepak Shankar, Mirabilis Design
Oct 30 2006 (0:30 AM), Embedded.com
Early performance analysis and architecture exploration ensures that you will select the right FPGA platform and achieve optimal partitioning of the application onto the fabric and software. This early exploration is referred to as rapid virtual prototyping.
A virtual prototype could simulate the FPGA and board using models that are developed quickly using pre-built, parameterized modeling libraries in a graphical environment. These models generally do not require implementation-level information such as the application software, pin-level connectivity and detailed signal data.
Virtual prototypes can be used during the product definition and specification for platform selection, bottleneck identification, hardware-software partitioning and functional correctness.
FPGA's can be simulated with varying levels of details at the IC and at the board-level. The level of detail will be determined by exploration required, state in the design cycle and amount of RTL and executable code available. At the specification phase, only a rough architecture specification is available.
The virtual prototype must be flexible to be constructed using only this limited available information, but still maintain a high degree of accuracy. This article presents an approach that enables designers to describe the FPGA architecture using preconfigured components and without resorting to a lot of programming. The FPGA used in the examples will be the Xilinx Virtex platform.
Oct 30 2006 (0:30 AM), Embedded.com
Early performance analysis and architecture exploration ensures that you will select the right FPGA platform and achieve optimal partitioning of the application onto the fabric and software. This early exploration is referred to as rapid virtual prototyping.
A virtual prototype could simulate the FPGA and board using models that are developed quickly using pre-built, parameterized modeling libraries in a graphical environment. These models generally do not require implementation-level information such as the application software, pin-level connectivity and detailed signal data.
Virtual prototypes can be used during the product definition and specification for platform selection, bottleneck identification, hardware-software partitioning and functional correctness.
FPGA's can be simulated with varying levels of details at the IC and at the board-level. The level of detail will be determined by exploration required, state in the design cycle and amount of RTL and executable code available. At the specification phase, only a rough architecture specification is available.
The virtual prototype must be flexible to be constructed using only this limited available information, but still maintain a high degree of accuracy. This article presents an approach that enables designers to describe the FPGA architecture using preconfigured components and without resorting to a lot of programming. The FPGA used in the examples will be the Xilinx Virtex platform.
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