ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
Developing an automotive electrical distribution system Part 1: System design
February 21, 2007 - automotivedesignline.com
The electronic content of a modern car has become one of the key brand differentiators in the market place. Alongside the obvious problems in ensuring that the latest technologies are available to be included is making sure that the associated systems supporting deployment into the vehicle can be developed and integrated into the final production vehicle.
Any problems are compounded by the pressure of ever decreasing design cycle times. As can be seen from the graph below, cycles have now been reduced to between 24 and 18 months, with a clear goal for most OEMs to reduce this to 12 months by 2010. Within this cycle the electrical distribution system supporting the electronic content must be designed, validated, and deployed. Doing this is increasingly dependent on developing new processes and tools to support those processes.
In order to preserve a reasonable margin, automotive OEMs must also see that an appropriate return is gained from the technology, by specifying vehicle models with an appropriate set of options in order to support accurate pricing. Recently the market has witnessed a dramatic increase in the amount of optional content in vehicles. This trend pushes the need to make the latest technologies available, whilst ensuring basic car models are still available in an extremely price competitive market.
E-mail This Article | Printer-Friendly Page |
Related Articles
- Automotive System & Software Development Challenges - Part 1
- Dealing with automotive software complexity with virtual prototyping - Part 1: Virtual HIL development basics
- Automotive System & Software Development Challenges - Part 2
- Providing memory system and compiler support for MPSoc designs: Memory Architectures (Part 1)
- FPGAs tackle microcontroller tasks: Part 1 - Application growth strains architecture and ASICs
New Articles
- Accelerating RISC-V development with Tessent UltraSight-V
- Automotive Ethernet Security Using MACsec
- What is JESD204C? A quick glance at the standard
- Optimizing Power Efficiency in SOC with PVT Sensor-Assisted DVFS Technology
- Bandgap Reference (BGR) Circuit Design and Transient Analysis in 90nm VLSI Technology
Most Popular
- Accelerating RISC-V development with Tessent UltraSight-V
- System Verilog Assertions Simplified
- Synthesis Methodology & Netlist Qualification
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)