English
Useful design patterns for building embedded multicore systems
By Anderson MacKay, Green Hills Software
February 26, 2008 -- dspdesignline.com
Consolidation is a long-standing trend within the embedded world. It enables more capable, higher-performance embedded devices using fewer components, at lower cost and power budgets.
The latest round of this trend is the proliferation of multicore embedded microprocessors, offering multiple processor cores in a single package " with lower power consumption and cost than an equivalent single-core processor.
Taking advantage of multiple processor cores will require more system-level design cooperation between software and hardware teams. In that spirit, here are high-level overviews of three simple models for multicore systems which are straightforward to implement with today's tools and hardware.
These multicore design patterns are not intended to be rigid models for exactly specifying a system. Rather, they are starting points for thinking and talking about the high-level picture of what your system does, and provide a common terminology so that hardware and software teams can hash out a multicore system structure.
February 26, 2008 -- dspdesignline.com
Consolidation is a long-standing trend within the embedded world. It enables more capable, higher-performance embedded devices using fewer components, at lower cost and power budgets.
The latest round of this trend is the proliferation of multicore embedded microprocessors, offering multiple processor cores in a single package " with lower power consumption and cost than an equivalent single-core processor.
Taking advantage of multiple processor cores will require more system-level design cooperation between software and hardware teams. In that spirit, here are high-level overviews of three simple models for multicore systems which are straightforward to implement with today's tools and hardware.
These multicore design patterns are not intended to be rigid models for exactly specifying a system. Rather, they are starting points for thinking and talking about the high-level picture of what your system does, and provide a common terminology so that hardware and software teams can hash out a multicore system structure.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related Articles
- Meeting Increasing Performance Requirements in Embedded Applications with Scalable Multicore Processors
- Programming heterogeneous multicore embedded SoCs
- Building eye-catching GUIs for your embedded MCU designs
- Building more secure embedded software with code coverage analysis
- Building high performance interrupt responses into an embedded SoC design
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)