Semiconductor IP Quality - A User guide

By Gerardo Nahum, and Omri Raisman, Rosetta IP Managing Directors

Abstract

SOC advantages are innumerable.  The weak point of SOC is the fact that in order to include so many functions onto the same die, and make it on time for your market window, projects are almost forced to use 85% of reusable designs (i.e. IP)

These are very good news for IP companies, but are they able to comply with the requirements implied in being 85% of their customer design.

This paper provides a holistic approach for to how to ensure your customer’s product is going to fulfill its destiny. The key for the IP companies’ success is their ability to ensure smooth integration of the IP, and the customer ability to see revenue generated from that product.

The IP vendor nightmare

IP provider: Hello, how is our fantastic product doing?

Customer: Ah yes, we’ve just off a conference call with our main customer, they have tested our SOC and found a non compliance related to your IP.

IP Provider: Ah, Uhh, but we have tested our testchip thoroughly and performed all the compliance tests

Customer: A management meeting has been scheduled for next week, in our customer’s site. We need your full attention to resolve this issue as soon as possible.

IP Provider: Well, this product has been released more than one year ago, mmm we need to discuss internally …

Sounds familiar? Well this is the IP Provider worst nightmare. Following this  event the IP provider will need to allocate resources to solve the issue. IP Provider usually has no knowledge of the end user application, and depends on the Customer or even higher up at the Customer  customer willingness to provide equipment, time, data etc

If he is lucky the Customer will suffer a 6 month delay to the chip production schedule , the loss of credibility will have the effect of big waves in a small pond hearting the perceived quality of  other products produced by the customer

The Customer is in the worst nightmare, at this point he wants to start looking for an alternative. They might not return to their original plan….

What where how … it went wrong

The common scenario described above is the main hurdle for IP providers to succeed at the market.  The semiconductor IP market is estimated at annual sales of $1.5 Billion US Dollar (BUSD), dominated by the Microprocessor, memory and standard interface blocks. The semiconductor market itself is estimated at annual sales of $245 BUSD, this gap can only be considered as market bend bearing in mind that 85% of those semiconductors products design are IP Cores 

The proliferation of IP is inevitable, for every function there are numerous companies with the right expertise, which could provide the IP block implementing the functionality required.

Yet, most of the semiconductors manufacturers have massive R&D teams, working to implement what is already available.  By large they are driven by the fear of the scenario described at the top. A multimillion product business compromised by a small IP block which does not perform in the adequate form. 

The question is how a design manager can assess the quality of an IP Core.

This paper bring some light over to this important issue, analyzing the current landscape and proposing a methodology to be followed both by the IP providers and the IP integrators in order to clear out today’s major road block.

Horizontal partitioning of a product will create a much more fertile ground for new ideas to come to life and will evolve the semiconductor industry conservative trading habits.

Evolutionary perspective

 In the beginning of the semiconductor era, all aspects of making a product where handle by the manufacturer. Starting from the specification, including the system architecture, design, manufacturing and sale, all activities were performed by the same company. They designed their own tools, used their own machines and implemented their own concepts.

The proliferation of companies dedicated to manufacturing only, created a demand for EDA tools. Companies specializing in EDA tools appeared, and helped uniform the CMOS design process. Their creativity, dedication and focus enable the minimization of the design effort for the semiconductor manufacturers. Eventually, it was a better and cheaper solution for the semiconductor industry.

In around year 2000s the advance of the processes shrinking was so huge, ultimately removing the physical barrier of adding more functions into the same die. Young companies, with bright ideas, where unable to manufacture and compete with the large companies. The alternative came in the form of IP licensing model as a way to introduce new technology to the market. As a fact 90% of the IP revenues today in the semiconductor area come from Microprocessors, Memories and standard interfaces.

What about the rest of the industry? Why aren’t they succeeding as IP companies?

Case Study

The case study is based on an mixed signal IP, implementing a standard interface including also complex Digital Signal Processing hardwired logic.

The case study spans over 11 years in which the product was developed, marketed, and evolved. The IP was instantiated in tens of millions of user parts, sold worldwide in different markets and over 20 different processes. The case study describes the different phase the product went thru and the different roadmaps created for the same functionality. The rough revenue out of this product is 30 MUSD lifetime.

The product development started with a firm specifications, implementing and IEEE standard. The first samples, categorized as alfa quality, did not make it into the customer product, but lead the way to the improved B silicon, which over the years became the high seller. Maturity of B silicon is attributed to two main factors: the first one being the fact that the alfa samples where tested in the field, the customer was closely supported and features not necessarily related to the standard where implemented. Among those, features reducing test time, enabling higher coverage and improving the performance.

The second factor is the ability of the team to capture the key issues and fix them.

B product was launched 1 year after the alfa product and became the main database for multiple porting and licensing cycle.

New processes with more strict requirements surfaced, and market needs induced a major redesign of the product. This redesign effort included power reduction, a further adaptation to the new CMOS processes and the inclusion of new features. A new roadmap was created, named C on Figure 1 coexisting with the B product.

A side effect of this new roadmap was the improvement of B, and life extension of B.

Further down the road, it yielded a new product, based on B technology but with features developed for new processes. The life extension of B, generated further revenue with a relatively small amount of effort from the engineering team.

The importance of a roadmap is crucial for an extended product life and showed clearly in this case.

Later on new and a similar manner, a new E and F product where generated , and coexist with B , C and D in order to enlarge the life time of the IP product.

Figure 1 Roadmap Generation

Quality

The major block roads for an IP company are to provide the required level of Quality and Support. For any given technology there are countless ideas to implement. Performance and benchmark is really easy to measure. But what manufacturer will dare to include into his product and under its brand is a block which does not have the adequate quality level?

What proof does the manufacturer has that when a problem will show up, the IP provider will still be there to support and solve his project.

A well defined and quantified quality standard is required for the IP industry to adopt. Among the top 20 semiconductor companies, you can find several similarities in their IP requirements from a well done design practices, fully verified design as well as been Silicon proven with good  outcome in terms of yield.

The quality assessment of an IP core needs to be easily performed and compared. There are several initiatives tackling this difficult task. None had achieved yet the goal of been able to objectively asses the quality of a design and point out on the risks and potential coverage holes.

Quality is not measured only by the actions taken in order to make sure the core complies with the specifications, it is also on the package provided for its integration and support, the contents of the documentation, the ability to foresee customer SoC scenarios and answer them within the package provided by the core.

A recipe is required to provide a package that answers 80% of the customer questions and enables the integration of the IP core in a seamlessly.

Figure 2 IP Product life cycle

Support your customer

Although the quality requirements from an IP outsourced are often higher than the internal design requirements, there are always scenarios and applications which were not foreseen and the IP provider is requested to support those cases.

Once the IP is integrated, the only AMO you have is to provide support. The integrator knowledge on the functionality of the IP can be portrayed as handling a black box. Supporting the IP customer is critical for an IP company to succeed.

Conclusion

IP core is just like any other product. It comprises a complete set of product deliverables in respect to business and production as well as its technology evolution roadmap.

During the course of its lifecycle the product will mature given the following driving forces:

• Valid technology roadmaps
• Ongoing investment in enhancements and support
• Strong Customer base

As the product will mature its quality will improve; on the other hand market proliferation will expose the IP core to unexpected usage.

The following measures should be taken to ensure the IP Quality:

• Maintain core development separate from Core deployment projects.
• Over time shift engineering from core development to integration services and later support.
• Continue and evolve core technology according to its roadmaps and in response to market trends

IP Quality assessment is a labor intensive process, here are few areas to look at before entering into an IP auditing effort :

• IP was proven in Silicon (DA flow was fire tested)
• Production Testing and Validation are in place
• IP has complete set of documentation.
• High level models & Integration suite with use cases
• IP has a dedicated team for support
• IP is been continuously developed - Roadmaps
• Reference customers (may not always help)

There is no doubt that IP companies will proliferate. The horizontalization of the process happens when semiconductor companies are required to focus their investments in optimizing processes, elevating yields and generally speaking improving their margins. The features and functionality are not the top priority. It can be brought from outside. This is the chance of the IP companies to provide real value to their IP. Providing a clear quality standard and an unconditional support will make it happen. When that stage is reached, the value of the IP will increase enormously, providing the right return for the new capability, rather than for the design effort.