Proposed SoC design foundry awaits industry rebound
Proposed SoC design foundry awaits industry rebound
By Kirtimaya Varma, EE Times
October 30, 2001 (4:17 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011030S0046
MANILA, Philippines K.C. Shih claims to be the first person in the world to conceive of a foundry for system-on-chip designs. "I am offering a new idea," said Shih, president and chief executive officer of Global Unichip Corp., based in Taiwan. "SoC design is not a single industry. It [encompasses] two industries requiring two entirely different kinds of expertise and levels of investment," i.e., design and fabrication. "All new ideas are first scoffed at," said Shih, "but gradually people get used to it and even imitate it." Shih, who worked as an engineer in the United States for 14 years before returning to Taiwan, is among a handful of Taiwanese entrepreneurs promoting the design foundry as a one-stop shop for system-on-chip (SoC) design. Like the manufacturing foundries of 15 years ago, the idea is initially a hard sell, Shih said, but he and colleagues like Tony Peng, who launched an SoC design foundry called Goya Technology Inc., are convinced their idea is here to stay. "Even when the electronics industry is passing through its worst slump," said Peng, "we [at Goya] hope to increase our turnover by 300 percent in 2001. This shows that we are fulfilling a need." To Shih, the concept of the design foundry grew out of the complexities of SoC design. "An SoC requires a number of [pieces of intellectual property]," he said. "Besides the IP, an SoC has many hardware components, both analog and digital. The complexities on SoC will increase tremendously. It is not possible for any design house to have the state-of-the-art expertise required to make all hardware and software components mounted on an SoC." Thus, Shih said, "If you are in the business of designing SoC [devices], you will have to set up a design foundry where you pool your locally generated resources with resources acquired from outside. so that you are able to become a one-stop SoC design-service provider to your customer." Shih earned a PhD from the Massach usetts Institute of Technology and went on to work with "a number of companies in America," where he "acquired state-of-the-art experience in various aspects of semiconductor design," he said. "When I wanted to apply new ideas, I returned to my native country and set up a company." After a stint as general manager at National Semiconductor Corp. in charge of 32-bit microprocessor development, he joined Cadence Design Systems Inc.'s Taiwan operation in 1990. In 1991 he founded Faraday Technologies. In January 1998, he co-founded Global Unichip with partner Nicky C. Lu. The company now employs 75 R&D engineers and has forged relationships with Artisan, Tensilica, ARM and MoSys. Taiwan Semiconductor Manufacturing Co. is its manufacturing ally, and Global Unichip's designs are optimized for TSMC's 0.35-, 0.25-, 0.18- and 0.15-micron processes. Two industries in one In some ways, Shih, Peng and a handful of other design foundry pioneers are following in the footsteps of TSMC chief ex ecutive Morris Chang, who built a business around the idea that the semiconductor industry was not one but two industries: IC design and chip fabrication. Design required little capital but a lot of talent. Manufacturing took much capital but less talent. Like Shih, Chang returned to Taiwan after working in the United States to implement his idea one that was initially dismissed. At the time, IC design and manufacturing were done under the same roof by integrated device manufacturers. There were hardly 20 design houses in the entire world at the time. Chang launched the first chip foundry in 1987, and TSMC has served as a catalyst for the two-sided model foreseen by Chang and Shih. Fabless designers loved the idea and flocked to TSMC, and thousands of design houses subsequently sprung up all over the world. Shih's brainchild, the SoC design foundry, has yet to enjoy that kind of success, but Shih is not worried. "Money will definitely come," he said. "With IC design moving from ASICs to A SSPs to SoC, traditional IC design houses will have a limited role to play. "There are not many takers of my idea today, but I am convinced that my idea is sound. Design houses will have to evolve into design foundries if they are to remain in business in the SoC era. Or they will be operating only in niche areas." Shih said there are two reasons why his idea has so far not caught on. "First, a new idea has less takers, so there are hardly any venture capitalists supporting the idea. Without funds, you cannot convert an idea into a business proposal. Second, the nature of this business is such that you have to put up with losses for some years before you can make profit." The first step is developing an IP portfolio before offering design services. "We have been developing IP for three years now, and have not made any money," Shih said. "Early birds need to be tough guys. Once the idea demonstrates its business potential, a lot of venture capital will flow into a design foundry." Poised f or takeoff With IP in place and the infrastructure ready, Shih believes Global Unichip is poised for a takeoff. Only "the downturn in the electronics industry has postponed our profitability," he said. Another early bird is Peng, who joined with other ex-TSMC employees in launching Goya in December 1998. "We wanted to convert our knowledge and experience into sure profits," said Peng, "and in the highly competitive and crowded electronics industry, we felt that [the] design foundry was a virgin area." Peng, 42, with 20 years of engineering experience, said he is sure the design foundry will emerge as a profitable segment. Goya, which specializes in IP, layout and ASIC turnkey services, was the first design-services house in Taiwan to tapeout in TSMC's 0.25-micron process. "When the industry turns around, our services will be more in demand," he said. Kirtimaya Varma is associate editor of sister publication EE Times Asia.
Related Articles
New Articles
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Synthesis Methodology & Netlist Qualification
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- Demystifying MIPI C-PHY / DPHY Subsystem
E-mail This Article | Printer-Friendly Page |