Chip makers hold edge as SoC providers, keynoter says

Chip makers hold edge as SoC providers, keynoter says
By Peter Clarke, EE Times
October 24, 2000 (2:08 p.m. EST)
URL: http://www.eetimes.com/story/OEG20001024S0060

EDINBURGH, Scotland — Semiconductor makers are in the best position to assemble the cores and software needed to produce system-on-chip (SoC) designs, albeit with help from tool and intellectual property (IP) providers, according to Bob Krysiak, group vice president and general manager of microcores division of STMicroelectronics, in a keynote address to IP2000 Europe.

"The semiconductor company is probably the only organization able to provide the software intellectual property for very complex chips," Krysiak said. On the software front, ST typically delivers 100,000 to one million lines of C code with each of its SoC solutions, he said.

Krysiak, an ST veteran who has led a number of high-end processor development projects at the company, said the acquisition and development of systems knowledge has become a core activity of ST. While CAD development and manufacturing run through the company as compulsory activities that add value, system s knowledge is the wellspring that drives all of ST's design activities, he said.

That's followed in importance by IP integration; meeting customer requirements with a coherent combination of hardware and software IP; developing key hardware IP; and developing key applications software.

These priorities leave room for third parties to develop individual reusable IP cores and to have them adopted by integrated device manufacturers such as STMicroelectronics, the keynoter said.

Krysiak said the supply chain has shifted in both the consumer electronics and telecommunications sectors, with traditional OEMs now outsourcing much of their engineering work and concentrating instead on marketing, brand-building and understanding customers' service requirements. As a result, chip makers are the holders of systems knowledge and are in position to manifest it in complete on system-on-chip designs that utilize IP.

"IP startups must spot niches and continually monitor the supply chain, and spot changes," K rysiak said.

Krysiak spelled out five major challenges facing large semiconductor companies: IP generation; design methodology, particularly verification; software and applications programming; differentiation of manufacturing through additional capabilities such as mixed-signal; and design reuse.

In the area of IP generation, Krysiak outlined the opportunity for IP developers by pointing out the large range of blocks now required to put together a comprehensive system-chip capability. "Only large companies can deliver this range," he said.

Regarding IP reuse, Krysiak said companies should be selective about the cores they want to make reusable. "Engineering reuse requires standards, documentation, tools," he said. "Design for reuse adds up to 50 percent in design resources used, so it's important to select the correct IP for reuse or it won't work."

Krysiak also painted a picture of a ST as a company not fully prepared to embrace independent standards. He stressed the importance of the compa ny's "Blue Book," an internal design guide. And he told his audience: "If you want to supply ST [with a core] make it Blue Book compatible."

In conclusion, Krysiak said there are major changes under way, and he identified the resultant winners as large semiconductor companies, the innovative IP developers that supply them, and the EDA tool developers that support the transfer of IP and design reuse.

"I see large and small companies working in harmony because they need each other," he said.