How manycore will reshape EDA
Abha Maheshwari, Cadence Design Systems
3/7/2011 12:50 PM EST
It is difficult to imagine a world without the smartphones, tablets, e-readers and game consoles that are pervasive in our lives today. Behind such innovations are embedded systems. To provide the automation and the speed to build them, EDA companies are taking advantage of the parallelism offered by multiple cores. All claim some multithreading and multicore capabilities and are porting more code to multithreaded applications.
This is certainly no easy task. EDA code is complicated, and EDA developers must work within Amdahl’s Law, which states that the gains you get from parallelizing code are sharply limited by any section that cannot be parallelized. Thus, if 90 percent of the code is parallelized and 10 percent is not, the maximum gain expected is 10x.
E-mail This Article | Printer-Friendly Page |
|
Cadence Design Systems, Inc. Hot IP
Related Articles
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)