English
Software and hardware challenges due to the dynamic raw NAND market
Daniel Allred and Gaurav Agarwal, Texas Instruments
6/12/2011 7:27 PM EDT
NAND flash is the dominant type of non-volatile memory technology used today. Developers commonly face difficulties developing and maintaining firmware, middleware and hardware IP for interfacing with raw NAND devices. After reviewing the history and differentiated features of various memory devices, we’ll take a detailed look at common obstacles to NAND device development and maintenance, particularly for embedded and system-on-chip (SoC) developers, and provide some recommendations for handling these challenges.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related Articles
- Complete NAND Flash Solution: Logic, PHY and File System Software
- Dealing with the challenges of integrating hardware and software verification
- ISA optimizations for hardware and software harmony: Custom instructions and RISC-V extensions
- IoT security: hardware vs software
- Is the Market ready to conquer PCIe 4.0 challenges ?
New Articles
- Accelerating RISC-V development with Tessent UltraSight-V
- Automotive Ethernet Security Using MACsec
- What is JESD204C? A quick glance at the standard
- Optimizing Power Efficiency in SOC with PVT Sensor-Assisted DVFS Technology
- Bandgap Reference (BGR) Circuit Design and Transient Analysis in 90nm VLSI Technology
Most Popular
- System Verilog Assertions Simplified
- Accelerating RISC-V development with Tessent UltraSight-V
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Understanding Logic Equivalence Check (LEC) Flow and Its Challenges and Proposed Solution
- Design Rule Checks (DRC) - A Practical View for 28nm Technology