Power: a significant challenge in EDA design
Brian Bailey, Contributing Technical Editor -- EDN, May 24, 2012
Power is the rate at which energy is consumed—not a hot topic 10 years ago but a primary design consideration today. A system’s consumption of energy creates heat, drains batteries, strains power-delivery networks, and increases costs. The rise in mobile computing initially drove the desire to reduce energy consumption, but the effects of energy consumption are now far-reaching and may cause some of the largest structural changes in the industry. This issue is important for server farms, the cloud, automobiles, chips, and ubiquitous sensor networks relying on harvested energy.
The reason for the sudden change is that physics was helping with process technologies down to 90 nm. With each increasingly smaller node, however, voltages decreased, creating a corresponding drop in power. In general, power budgets remained fixed even as developers integrated additional capabilities. With smaller geometries, voltage scaling is more difficult and is failing to keep up. As voltages approach the threshold voltage, switching times increase. To compensate, designers lowered threshold voltages, but doing so caused a significant increase in leakage and switching currents.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related Articles
New Articles
- Understanding MACsec and Its Integration
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- The Critical Factors of a High-performance Audio Codec - What Chip Designers Need to Know
- Density Management in Analog Layout Design: Addressing Issues and Ensuring Consistency
- Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automation
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Synthesis Methodology & Netlist Qualification
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- Understanding Logic Equivalence Check (LEC) Flow and Its Challenges and Proposed Solution