Anti-fuse memory provides robust, secure NVM option
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Kilopass Technology (Jan. 10, 2018)
Bernd Stamme, Kilopass Technology Inc.
EETimes (7/5/2012 3:14 PM EDT)
Embedded non-volatile memory (NVM) intellectual property (IP) is a requirement for storing data that must be preserved when power to the chip is removed. NVM is found in almost every system on chip (SoC) design today, especially those targeting connected devices accessing content protected by digital rights management and sensitive financial or personal data. As these SoC designs migrate toward 28 nm and lower processes, engineering teams are re-examining the available commercial options. This reappraisal is occurring because of challenges presented by these smaller geometry processes. Suddenly, what was once an insignificant commodity is threatening to become a technology bottleneck.
NVMs can be classified in two groups: those that are programmed once and those that can be reprogrammed. In the former category, the most fundamental form of NVM is the masked ROM, which is programmed during the chip fabrication process. Next, comes the e-Fuse, which gets programmed during final test, followed by, anti-fuse technology, which can be programmed at wafer sort or final test or in the field at later point in time. In the latter category of reprogrammable memory are commercially available embedded Flash and floating gate alternatives. In the lab, new resistive RAM alternatives are being developed to compete in the reprogrammable arena.
E-mail This Article | Printer-Friendly Page |
|
Related Articles
- Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
- The benefit of non-volatile memory (NVM) for edge AI
- NVM memory: A Critical Design Consideration for IoT Applications
- Embedded antifuse NVM: A mission critical IP for display driver ICs
- Importance of Dynamic Programming for Achieving Hard Breakdown in Anti-Fuse Technology
New Articles
- Accelerating RISC-V development with Tessent UltraSight-V
- Automotive Ethernet Security Using MACsec
- What is JESD204C? A quick glance at the standard
- Optimizing Power Efficiency in SOC with PVT Sensor-Assisted DVFS Technology
- Bandgap Reference (BGR) Circuit Design and Transient Analysis in 90nm VLSI Technology
Most Popular
- Accelerating RISC-V development with Tessent UltraSight-V
- System Verilog Assertions Simplified
- Synthesis Methodology & Netlist Qualification
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)