David Wang, Inphi Corp.
EETimes (3/12/2013 12:35 PM EDT)
When JEDEC Solid State Technology Association announced the initial publication of its widely anticipated DDR4 SDRAM standard, JESD79-4, the voluminous document described the DDR4 SDRAM device in exacting detail. However, JESD79-4 was not intended as a tutorial on system design or to provide explanations as to if and how specific system designs should be migrated to utilize DDR4 SDRAM devices, so it’s left to the readers to imagine the possible advantages of the technology at the system level. Consequently, a knowledge gap exists between the presentation of the technical details in JESD79-4 and understanding the underlying motivations and rationale that led to the standard. In an attempt to bridge that knowledge gap, let’s explain some of the purpose of the DDR4 SDRAM device, and frame it in the context of system level trends.[1] By understanding the underlying motivations of the DDR4 SDRAM device specification, engineers and program managers can better decide whether or not their current and future designs should migrate to support DDR4 SDRAM devices.
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