Data acquisition systems and SoCs - A guide
Asha Ganesan, Cypress
EDN (August 26, 2013)
Data acquisition systems (abbreviated with the acronym DAS or DAQ) measure real world signals (temperature, pressure, humidity etc.) by performing appropriate signal conditioning on a raw signal (amplification, level shifting, etc.), and then digitizing and storing these signals. This digital signals can then be transmit to another digital system for further processing, usually on a periodic basis.
Examples of data acquisition systems include such applications as weather monitoring, recording a seismograph, pressure, temperature and wind strength and direction. This information is fed to computers, which then predict natural events like rain and calamities like earthquakes and destructive winds. An example of a DAS in the medical field is a patient monitoring system that tracks signals like an ECG (Electro-cardiogram) or EEG (Electro-encephalogram).
A typical DAS consists of the following components:
- Sensors that convert real world phenomenon to equivalent electrical analog signals
- Signal conditioning circuitry that alters signals from the sensor to a form, which can be digitized
- Analog to digital converters that convert conditioned analog signals to a digital representation
- Store and forward memory, which is used to store digital signal streams for forwarding to another system at a later time
- A communication interface over which the digital streams are transferred to the other system
- A microprocessor system or a microcontroller to sequence and control all of the other components.
Figure 1 shows a block diagram of a basic data acquisition system. The details of these internal blocks are explained in the next section.
E-mail This Article | Printer-Friendly Page |
|
Related Articles
- Simplifying AC and DC data acquisition signal chains
- Design trade-offs of using SAR and Sigma Delta Converters for Multiplexed Data Acquisition Systems
- The role of IP in the new generation of data center SoCs
- Secure Mobile Payments - Protecting display data in TrustZone-enabled SoCs with the Evatronix PANTA Family of Display Processors
- Changes in data flow 'pipeline' needed for SoCs, new data types
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)