English
DXTP GPU, and advanced graphics and compute acceleration for power constrained devices
20nm Dilemma Explained
Handel Jones, International Business Strategies Inc.
EETimes (4/4/2014 06:00 PM EDT)
Fully depleted silicon-on-insulator is the best solution for the 28nm and 20nm technology nodes because of its lower cost and leakage and higher performance than bulk CMOS.
The cost of a 100mm2 die in FD SOI at 28nm is 3.0% lower than bulk CMOS and 13.0% at 20nm due to higher parametric yield as well as lower wafer cost. The data also shows that an FD SOI die with comparable complexity to bulk CMOS is 10% to 12% smaller.
The combination of the smaller die area and higher parametric yield should give an equivalent product a 20% cost advantage at 20nm for FD SOI compared to bulk CMOS. In addition, at 28nm FD SOI has performance that is 15% higher than 20nm bulk CMOS. (See chart below.)
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related Articles
- High Speed, Low Power and Flexibility Drive DisplayPort's Increasing Popularity
- Network-on-chip (NoC) interconnect topologies explained
- The Designer's Dilemma: Everything is OK... Until It Isn't
- Paving the way for the next generation audio codec for the True Wireless Stereo (TWS) applications - PART 1 : TWS challenges explained
- Scaling NAND flash to 20-nm node and beyond
New Articles
- How the Ability to Manage Register Specifications Helps You Create More Competitive Products
- EAVS - Electra IC Advanced Verification Suite for RISC-V Cores
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- PCIe error logging and handling on a typical SoC
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- Synthesis Methodology & Netlist Qualification