ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
Building ARM-based Bluetooth-enabled wearables
By Diya Soubra, ARM
EETimes Europe (September 17, 2014)
The fast evolving market for wearable products will see explosive growth and many new use cases over the next few years. Market research company IHS predicts this market will be worth $30 billion in revenues and 210 million units by 2018.
Devices worn on the wrist such as fitness activity trackers like Misfit or Misfit Shine, smartwatches like the Pebble mobile smartwatch or the recently announced Omate X smartwatch or products with the potential to form a new category like wristbands that authenticate a user's identity through their electrocardiogram (ECG) are likely to make up a majority of shipments.
But there are number of other imaginative use cases such as T-shirts with embedded displays that potentially could show a video that is running on the wearer’s smartphone, along with a whole host of new applications that will fully grasp the possibilities offered by wearables as part of the Internet of things, linking devices to cloud computing.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Arm Ltd Hot IP
Related Articles
- Designing a low-cost, low-power multicore ARM-based AV player
- Designing an ARM-based Cloud RAN cellular/wireless base station
- Benchmarking an ARM-based SoC using Dhrystone: A VFT perspective
- ARM-based Android hardware-software design using virtual prototypes - Part 1: Why virtualize?
- Optimize data flow video apps by tightly coupling ARM-based CPUs to FPGA fabrics
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow